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am335x NOR boot

Other Parts Discussed in Thread: AM3517

Hi Miroslav,

 1. I went through this wiki - http://processors.wiki.ti.com/index.php/Linux_Core_U-Boot_User%27s_Guide

2. At end of this doc for NOR boot,

a. NOR offset addr. to store dtb and filesystem is not specified. Please give me these offset addresses.

b. what is the EVM switch position to boot from NOR, this is not mentioned in this wiki, http://processors.wiki.ti.com/index.php/AM335X_StarterWare_Booting_And_Flashing?

c. One needs to pass root=/dev/mtdblockN where N is the number of the rootfs? What is this N?

3. This is in general, please suggest any site/doc for me to understand these things

a. How are the RAM addresses for tftping images decided in uboot?

b. How are the addresses chosen to load uboot, linux, dtb on to RAM decided?

Regards,

Gangadhar

  • Hi Gangadhar,

    As stated here the AM335x GP EVM doesn't support NOR boot. In the link you posted above, what is referred to as "booting from NOR" is actually just running the root file system from the NOR flash.

    Apart from this, the offsets depend only on the contents of your "mtdparts" environment variable.

    Gangadhar Gangu said:
    One needs to pass root=/dev/mtdblockN where N is the number of the rootfs? What is this N?

    N is the partition number that the kernel will use for the root file system, described inside the device tree file (for kernel 3.12) or the board configuration file (for kernel 3.2).

    Gangadhar Gangu said:

    3. This is in general, please suggest any site/doc for me to understand these things

    a. How are the RAM addresses for tftping images decided in uboot?

    b. How are the addresses chosen to load uboot, linux, dtb on to RAM decided?

    This all depends on the environment boot commands. Take the "nandboot" command for example:

    nandboot=echo Booting from nand ...; run nandargs; nand read ${fdtaddr} NAND.u-boot-spl-os; nand read ${loadaddr} NAND.kernel; bootz ${loadaddr} - ${fdtaddr}

    It reads the device tree file from NAND.u-boot-spl.os partition to address $(fdtaddr). Then it reads the kernel from NAND.kernel partition to address ${loadaddr}. Finally it uses the "bootz" command to boot from these addresses.

    The NAND.{something} in the above commands are partition offsets described inside the "mtdparts" environment variable:

    mtdparts=mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),128k(NAND.SPL.backup2),128k(NAND.SPL.backup3),256k(NAND.u-boot-spl-os),1m(NAND.u-boot),128k(NAND.u-boot-env),128k(NAND.u-boot-env.backup1),8m(NAND.kernel),-(NAND.rootfs)

    The ${fdtaddr} and ${loadaddr} are addresses in the RAM, again described as environment variables.

    Best regards,
    Miroslav

  • Hi Miroslav,

                        I want to boot from NOR as my customer board also requires NOR boot. I did make am335x_evm_nor and when I boot over UART using the generated images I get,

    Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
    *** failed ***
    ### ERROR ### Please RESET the board ###

    I found that M29W128GL is the NOR flash used in EVM.

    Please tell me what is the next thing I should do for NOR boot.

    Regards,

    Gangadhar

  • Please post the steps you follow to boot from UART. Which binary file do you use to boot from UART?

    Best regards,
    Miroslav

  • Hi Miroslav,

    1. make am335x_evm_nor

    2. using <u-boot>/spl/u-boot-spl.bin and <u-boot>/u-boot.img

    3. a. Start picocom from the folder containing the UART boot images (board is OFF):
    # picocom -b 115200 /dev/ttyS0 --send-cmd "sx -vv"

    b. Press CTRL+A; CTRL+S; to send the u-boot-spl.bin file via UART and then start the board.

    c. After transfer is complete press CTRL+A; CTRL+S; to send the u-boot.img file.

    d. After transfer is complete interrupt the boot sequence to enter U-Boot mode.

    4.

    U-Boot 2013.10-00189-g78d8ebd-dirty (Jun 02 2014 - 16:39:53)

    I2C:   ready
    DRAM:  512 MiB
    Flash: flash_info[i].flash_id = 0xffff
    *** failed ***
    ### ERROR ### Please RESET the board ###

    Regards,

    Gangadhar

  • Did you modify u-boot to support your NOR? The support in u-boot is for a multipllex NOR that is x8. This is a NOR memory module for a Beaglebone. If your NOR is different, you have to modify u-boot.

    Steve K.

  • Hi Steve,

                    I'm using am335x EVM and the NOR flash - M29W128GL that comes with it.

    Regards,

    Gangadhar

  • Gangadhar, please check this suggestion by Biser: http://e2e.ti.com/support/arm/sitara_arm/f/791/p/337720/1178521.aspx#1178521

    Biser Gatchev-XID said:
    There are two zero ohm resistors on the baseboard, R68 and R472, which are normally not populated. Check if you have these installed.

    Best regards,
    Miroslav

  • Hi Miroslav,

                        R68 and R472 are not populated. I've to get this working as my boot device is NOR. What is the next solution for NOR boot?

    Regards,

    Gangadhar

  • Moving this to the original thread. Please do not open new threads on the same topic.

  • Hi,

    As we are waiting for below link response

    Please respond to below request

    http://e2e.ti.com/support/arm/sitara_arm/f/791/t/345043.aspx

    We use AM335x GP EVM Board.

    But am335x_evm_nor build u-boot fails with below FLASH Error.

    U-Boot SPL 2013.01.01 (Jun 05 2014 - 14:36:20)
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Peripheral mode controller at 47401000 using PIO, IRQ 0
    musb-hdrc: ConfigData=0xde (UTMI-8, dyn FIFOs, bulk combine, bulk split, HB-ISO Rx, HB-ISO Tx, SoftConn)
    musb-hdrc: MHDRC RTL version 2.0
    musb-hdrc: setup fifo_mode 4
    musb-hdrc: 28/31 max ep, 16384/16384 memory
    USB Host mode controller at 47401800 using PIO, IRQ 0
    OMAP SD/MMC: 0
    reading u-boot.img
    reading u-boot.img


    U-Boot 2013.01.01 (Jun 05 2014 - 14:36:20)

    I2C: ready
    DRAM: 512 MiB
    WARNING: Caches not enabled
    Flash: ## Unknown flash on Bank 1 - Size = 0x00000000 = 0 MB
    *** failed ***
    ### ERROR ### Please RESET the board ###

    Regards

    Sithick H

  • Hi Biser,

    R68 and R472 are the ones to be used for Standalone base board booting as per below topic,

    http://e2e.ti.com/support/arm/sitara_arm/f/791/p/217858/767501.aspx#767501

    How it could resolve this NOR flash(Daughter board) support issue.

    Please confirm any u-boot changes required.

    Regrds

    Sithick H

  • Guys, any progress on this, I've to get this working.

    Regards,

    Gangadhar

  • Gangadhar, I've asked the factory team for support on this issue. I'll let you know as soon as I have an answer.

    Best regards.
    Miroslav

  • Thanks Miroslav for this initiative.

    Regards,

    Gangadhar

  • Gangadhar,

    It seems like I missed what Steve suggested above, but this is what the factory team told me as well:

    Steve Kipisz said:
    Did you modify u-boot to support your NOR? The support in u-boot is for a multipllex NOR that is x8. This is a NOR memory module for a Beaglebone. If your NOR is different, you have to modify u-boot.

    In other words, the "make am335x_evm_nor" build target sets up the NOR for a BeagleBone cape memory module, which is different from the one on the GP EVM, so u-boot has to be modified appropriately for your NOR flash. This is why it doesn't work "out of the box".

    Best regards,
    Miroslav

  • Hi Miroslav,

    Thanks for your valuable info.

    We started updating u-boot for NOR Flash Support.

    Kindly confirm us for GP EVM 1.4 A Baseboard  and 1.2A daughterboard NOR x8 or x16 bit data width to be used?

    From daughter board schematics page no 3 shows only 8 data lines connected to base board as below

    Regards

    Sithick H

     

  • Ok, thanks for the info Miroslav.

    Regards,

    Gangadhar

  • Hi all,

    The GP EVM DaughterBoard uses a 16-bit NOR Flash.

    Best regards,
    Miroslav

  • Hi Miroslav,

    Daughter board uses 16 bit NOR flash but only Lower 8 data lines(NOR_D[7:0]) is connected to CPLD to the AM335x.

    Remaining upper 8 data lines (NOR_D[15:8]) is not connected to the CPLD to the AM335x as per the schematic.

    Then how to accesses as an 16bit NOR Flash from the AM335x processor?

    6746.am335x_gpevm_15x15baseboard_schematic_rev1_1a.pdf

    4503.am335x_gpevm_gpdboard_3h0001_schematic_rev1_2a.pdf

    With Thanks & Regards,

    Sithick

  • The NOR flash should only be operational in CPLD profile 3 when all the data signals are connected to the AM335x. Keep in mind that NOR support in U-Boot was only tested on a BeagleBone + a NOR module as stated here by Steve.

    Best regards,
    Miroslav

  • Hi Mirsolav,

    Yes we are using profile 3 only.

    Please help us on the below query,

    Why upper 8 data lines (NOR_D[15:8]) is not connected to the CPLD/AM335x as per the schematic?

    (Only Lower 8 data lines(NOR_D[7:0]) is connected to CPLD to the AM335x)

    Regards

    Sithick H

     

  • Hi Biser,

    As per below link,

    http://processors.wiki.ti.com/index.php/AM3517/05_GPMC_Subsystem

    16 bit NOR flash(Non Multiplexed) in AM335x GP EVM cannot be accessed by GPMC without external latch.

    Since without latch it will work only upto 2KB.

    Also gpmc_ADVn_ale not used for 16 bit NOR.

    Please clarify on this?

    Regards

    Sithick H