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preemption mode for c66x DSP and synchronization



Sorry I need to post a new thread upon my old thread http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/343668/1202181.aspx#1202181, because the old thread hasn't get replied, I think it's because I marked it as 'verified' for Johannes's explanations.

Basically based on the old thread, I asked about the preemption mode for the c6678 DSP, and if we can load totally different applications to different cores at different time to run on the DSP. Johannes has given me some explanations, but I got some more question, could someone help me answer these question? Thanks,

Jie Liao- said:

 Yeah, it makes much sense in BIOS when switching between tasks with different priorities. Do you know if it's possible to do that without BIOS? Or even with different applications. As far as I know, the SYS/BIOS needs to be compiled with application to get it run on DSP cores, so that task switching is happening within actually one applications. What if one application is running (no matter with or without BIOS) on one core, then another application comes and wants to preempt the running application? Is that possible on such DSP? I think this approach will treat the DSP as a general multi-core CPU, but sometimes the multi-core DSP is acting like a general CPU, right?

Jie Liao- said:

What do you mean cores will be synchronized? What if my different applications are totally separate ones with no possible or needed communication? Can I loaded them separately at different time? 

C6678 is a standalone multicore DSP, and also in case of Keystone II which has ARM cores and DSP cores integrated on one chip, if running a OS on ARM cores (Linux), would things be different?  

Thank you.

Jie

  • Hi Pubesh, I got to understand how IPC synchronize processors, that is for applications using IPC to communicate with each other right?

    Right now my confusions are two aspects regarding I want to run multiple applications on multiple cores:

    First if my applications don't need to communicate at all, they are totally independent, can I load them to different cores at different time? That means when I load one application to  one core, there may be other applications running on other cores at the same time, and of course on the same multiple DSP.

    Second, suppose I could do the above thing. If my applications have dependencies so that they need to communicate, can I load them to different cores at different time? From the second link you gave me, it says that IPC_START() will synchronize multiple processors so that they can boot in any order, I assume the processor case is the same as different cores on the multi-core DSP, right?

    Thanks for your help,

    Jie

  • Hi Jie,

     Yes. Please use IPC to communicate between cores.

    1. Yes. You shall load them at different time. But only Core0 shall wake up the secondary cores to boot.

    During the boot process, the RBL executes an IDLE command on the secondary CorePacs and keeps the secondary CorePacs waiting for an interrupt. After the application code to be loaded in these secondary CorePacs are loaded and the BOOT_MAGIC_ADDRESS values in individual CorePacs are populated, the
    application code in the CorePac0 can trigger the IPC interrupt to wake up the secondary cores and branch up to the address specified in the BOOT_MAGIC_ADDRESS.

    Please refer for information: KeyStone Architecture DSP Bootloader (SPRUGY5)

    2. Yes. I think, it is possible even with IPC.

    Thanks.

  • Hi Jie,

    Any update. Help us to close this thread.