Hi,
I'm working omap5 based DRA7xx EVM.
I want to add the 192MHz clock, 8-Bit, SDR mode support in my u-boot omap-hsmmc driver.
Kindly help me to add this support.
Thanks
Ramappa
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Hi,
I'm working omap5 based DRA7xx EVM.
I want to add the 192MHz clock, 8-Bit, SDR mode support in my u-boot omap-hsmmc driver.
Kindly help me to add this support.
Thanks
Ramappa
Hi,
You can start from the following paragraph in the device TRM:
25.4.12.2 Generation on Rising Edge of MMC Clock
This mode increases setup timings and allows reaching higher bus frequency. This feature is activated by
setting the MMCHS_HCTL[2] HSPE bit to 1. The controller must be set in this mode to support SDR
transfers.
Take a look at sub-chapter: 25.4.13 Sampling Clock Tuning
And tunning of the MMCHS_PVHSSDR12 register.
Check the device TRM for more information about the requred registers.
Regards,
Boyko