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TMDSEVM6657LS in uTCA chasis'problem for pcie

Hello,

I'm using TMDSEVM6657LS in a Blue-Ema uTCA chasis with a Nat-MCH-PCIE-GEN3,when i plug the EVM board to the slot which is used for RootComplex  it can be identified by mch, but when i use mch's  command to see the ekey status,it only have Ethernet's output.

when i plug EVM to any other slot which is for downstream,Ethernet and PCIE  status can be printed .

I already have SW5.3  off to have backplane clock. and download the PCIE-example project to the dsp ,and set PCIE mode to RC.  I only use ccs5to debug with xbs200 emulator,i guess that means i successfully download the code to DSP.

Do I miss something that will cause that problem?

Regards,

  athrun

 

  • Hi Athrun,

    I don't have specific advice for you but more of something to double check.  When I was using the C6678EVM, I realized that in some slots the TI backplane and the chassis backplane did not align.  I will give you my example and perhaps it will be a clue?

    I need SRIO enabled.  The EVM would only enable SRIO on backplane lanes 8 to 11, so I could only use AMC slots 6 to 10 otherwise the ekey would not show SRIO.

    So what I am asking is, what lanes does the RootComplex slot use and does it line up with the lanes the EVM is expecting?

    Maybe this is not so helpful and some else has a better idea.

  • Hi Jin,

    Please provide more information:

    1. Share your EVM boot mode switch settings and MCSDK version?

    2. You got any error message in CCS debug window? Please share the current debug window log file.

    Thanks,

  • Hi Gannapathi,

    1. I only let sw3.1  and sw5.3 be off, and in my ccs folder there are mcsdk_2_01_01_04  and pdk_c6657_1_1_1_4

    2.I still can't see the ekey in mch's debug view,but in ccs it shows link is up

    I don't know if this means EVM work properly for pcie?

     

  • HI,BrandyJ

    Thanks for your answering,right now slot2 is the upstream ,EVM in this slot can't show ekey status , but when I set slot2 to downstream ,it can show the ekey status which is downstream.So i think it's not about the slot's site you said .but still thank you.

  • Hi Jin,

    The PCIe example project is used to test the PCIe driver for two EVMs. Please take a look at “\ti\pdk_C6678_1_1_2_6\packages\ti\drv\pcie\example\sample\Readme.txt” file for more information.

    I think the PCIe example project is not support for your current test setup.

    Thanks,

  • Hi Ganapathi,

    I know the example project is used for two EVMs, but I think the code can be modified to apply more complicated situations such as one EVM for RC and FPGA for EP.I saw many posts about that.

    Right now I only plug one EVM into the utca  chasis,and the output shows "link is up" .Does that mean the EVM detect the PCie switch on the MCH?

    And if I plug one more board such as another EVM as EP and both boards show "link is up",can i assume that they can exchange data with PCIE?

  • Hi Jin,

    I have not worked on similar setup. Also, I do not enough resources to re-produce your case. 

    My understanding, you have only plug one EVM into the utca chassis the EVM properly initialized and try to push a single message to the EP device.

    If you plug another EVM and configure the board as EP, Both boards are successfully exchange data with PCIE. You can check the both EVM log message in CCS debug window.

    Thanks,