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DDR3 C6657 Pin Connectivity Tables

Shaun Caraway
Prodigy 50 points
Other Parts Discussed in Thread: TMS320C6657

I see that the the Appendix section has been removed from the DDR3 Design Requirements for KeyStone Devices ( SPRABI1A—April 2011). I am using a TMS320C6657 and am implementing a 64M x 16 SDRAM (http://www.issi.com/WW/pdf/43-46TR16640A-81280A-16640AL.pdf) with the processor. I am curious why the appendix was removed? Was table 42 of the appendix correct? 

  • 0
    TI__Mastermind 42545 points

    Hi Shaun,

    Most of the tables showing the connection between the SOC and the memory component were redundant and repetitive. Connections to the DDR3 memories is well defined in the DDR3 spec and is presented in a more general form in the block diagrams. Very few changes to these connections changes when the density of the part is altered.

    Regards,Bill