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DDR PLL Value for Uboot

Gangadhar Gangu
Expert 1865 points

Hi All,

           I want to know how to choose a value for first argument - "pll" of config_ddr() function call in board/ti/am335x/board.c file. I'm using MT41K128M16JT125.

Regards,

Gangadhar

  • 0
    TI__Guru**** 393215 points

    For DDR3 memories the allowed DDR_CLK frequency range is from 303MHz to 400MHz max. On the EZSDK v3.2 this is setup in the file board.c file in the s_init function in the following lines:

    else if (!strncmp("A33515BB", header.name, 8) &&
                    strncmp("1.5", header.version, 3) <= 0)
            config_ddr(303, MT41J512M8RH125_IOCTRL_VALUE, &ddr3_evm_data,
                   &ddr3_evm_cmd_ctrl_data, &ddr3_evm_emif_reg_data);