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AM3356 USB1 UART3 enable.

Hi,


I want to use USB1 as UART3 port to get the debug messages.

here below the possible way shows in SRM

16.2.4 USB GPIO Details:
The USB module supports configuration of the DP and DM pins as pass-through GPIOs. In this device,
the GPIO mode is used to provide UART over USB interface functionality. Chip level logic allows
connection of the UART TX/RX data signals to either DP or DM in either normal or inverted state as
shown in Figure 16-2. The diagram shows the UART2 / USB0 port implementation. This logic is also
replicated for the UART3 / USB1 ports.


Please let me know where i need to configure the register 0x44e10628. Is there any patch which is available for this. because in the code am not able to see any registers for GPIOMODE selection.


Rgds,

chandra

  • Hi Chandra,

    You can do this alongside the pinmux configuration.

  • Hi Biser,

    If I get an example to modify the change then it is really grateful help.

    Rgds,

    chandra

  • Hi Biser,


    USB1 has no mux mode to do this is pinmux.

    But in the note it written as "(13) The internal USB PHY can be configured to multiplex the UART3_TX or UART3_RX signals to this terminal. For more details refer to USB GPIO Details section of the AM335x Technical
    Reference Manual."

    Kindly let me know how it can be done in code.

    Rgds,

    chandra

  • As I said above you simply have to write the required value to register usb_ctrl1 at address 0x44e10628. See section 9.3.1.22 of the AM335X TRM Rev. J for the register fields.

  • Thanks Biser,

    Here below the list of changes i did on my code,

    changed following code in u-Boot to write the 0x44e10628 register,

    static void am33xx_usb_set_gpiomode(u8 on, u32 *reg_addr)
    {
        if (on) {
            clrsetbits_le32(reg_addr, GPIO_SIG_INV | GPIO_SIG_CROSS | OTGVDET_EN | OTGSESSENDEN,
                    CM_PHY_PWRDN | CM_PHY_OTG_PWRDN | GPIOMODE);
        } else {
            clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
        }
    }

    And seeing in uboot print,

    U-Boot#
    U-Boot# md 0x44e10628 10
    44e10628: 3c001007 00000000 0000cb09 107239d0    ...<.........9r.
    44e10638: 0000cd09 107239d0 00000000 00000000    .....9r.........
    44e10648: 00000000 00000000 000000f0 00000000    ................
    44e10658: 00000000 00000000 00000000 00000000    ................
    U-Boot#

    Also compiled my code for am335x_evm_uart3 and changed "console=ttyO0,115200n8\0" \ to  console=ttyO3,115200n8\0" \.


    But still i am getting prints on UART0 only. Please let me know is anything i need to change in code.

    Rgds,

    chandra

  • Hi Chandra,

    Chandrashekhar V1 said:
    Also compiled my code for am335x_evm_uart3 and changed "console=ttyO0,115200n8\0" \ to  console=ttyO3,115200n8\0" \.

    But still i am getting prints on UART0 only. Please let me know is anything i need to change in code.

    Do you still have U-Boot output on your UART0 port after you compiled the U-Boot with the "make am335x_evm_uart3" target? Please make sure that the new MLO and u-boot.img files are written to the SD card before removing it (execute "sync").

    Regarding the kernel boot console, you can check if the new "console=" value is applied at the top of the boot log when the kernel prints its boot arguments. If it isn't applied, then maybe something else is overwriting it. Check this.

    To sum it up, when you need to redirect the console to another UART port, you need to do these things:

    * User space:
    in /etc/inittab:
    S:2345:respawn:/sbin/getty 115200 ttyO3

    * U-Boot:
    make am335x_evm_uart3

    * Kernel (in U-Boot bootargs):
    console=ttyO3,115200n8

    Best regards,
    Miroslav

  • Hi Miroslav,

    I am using NOR boot in our design there is no SDCARD also i am still at the level of Uboot coding. Initially we wan to get the u-boot prints on USB1/UART3

    By mean time i will check with by make distclean and compile again.

    Rgds,

    chandra

  • I didn't realize. OK, so make sure that the new (generated with "make am335x_evm_uart3" command) MLO and u-boot.img are correctly written to the NOR flash. If they are and the U-Boot has been compiled successfully, then the U-Boot console messages should appear on UART3.

    Best regards,
    Miroslav

  • Thanks Miroslav,

    There is some confusion let me explain what I am doing.

    At present I am loading uboot binary(u-boot.bin) using u-boot-spl.bin.

    I am not using any MLO file to boot.

    If want to use MLO file then do i need to write MLO also using xmodem before the u-boot.bin load?


    Rgds,

    chandra

  • Chandra,

    You are loading the correct file. For peripheral boot (usb0/uart0/emac) you download the u-boot-spl.bin file. For memory boot (nand/mmc/emmc) you download the MLO file.

    Steve K.

  • Chandrashekhar V1 said:
     if (on) {
            clrsetbits_le32(reg_addr, GPIO_SIG_INV | GPIO_SIG_CROSS | OTGVDET_EN | OTGSESSENDEN,
                    CM_PHY_PWRDN | CM_PHY_OTG_PWRDN | GPIOMODE);
        } else {

    I never used the USB uart mode, but this line of code seems not correct. Setting CM_PHY_PWRDN and CM_PHY_OTG_PWRDN bits turns off the USB PHY power. I would think you have to keep the PHY power on even in the GPIO mode.

  • Hi Bin,

    Can you please let me know what should be the value written for register 0x44e10628. I will write that value and test.

    Rgds,

    chandra.

  • Chandra,

    As I said I never tested this mode, but I would think you only have to set GPIOMODE bit, and one of GPIO_SIG_INV and GPIO_SIG_CROSS bits depending on how you use DP/DM for RX/TX lines. So it either is GPIO_SIG_INV | GPIOMODE, or GPIO_SIG_CROSS | GPIOMODE.

  • Chandra,

    It looks like you have the value 0x3c001007 loaded into usb_ctrl1 reg.

    I think the PHY needs to remain powered as Bin suggested & usb_ctrl1 reg should have value 0x3c001000.

    Please try.

    -Mark

  • Hi Mark,


    Still the result is same I am getting prints on UART0,

    Here below is code change,

    static void am33xx_usb_set_gpiomode(u8 on, u32 *reg_addr)
    {
        if (on) {
            clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN | GPIO_SIG_INV | GPIO_SIG_CROSS |OTGVDET_EN | OTGSESSENDEN | CHGDET_DIS,
                    GPIOMODE);
        } else {
            clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
        }
    }

    Debug prints on UART0,

    U-Boot# md 0x44e10628 10
    44e10628: 3c001000 00000059 0000cb09 107239d0    ...<Y........9r.
    44e10638: 0000cd09 107239d0 00000000 00000000    .....9r.........
    44e10648: 00000000 00000000 000000f0 00000000    ................
    44e10658: 00000000 00000000 00000000 00000000    ................
    U-Boot#

    Code change in boards.cfg file,

    Active  arm         armv7          am33xx      ti              am335x              am335x_evm_nor                       am335x_evm:SERIAL4,CONS_INDEX=1,NAND,NOR                                                                                          Tom Rini <trini@ti.com>
    Active  arm         armv7          am33xx      ti              am335x              am335x_evm_norboot                   am335x_evm:SERIAL4,CONS_INDEX=1,NOR,NOR_BOOT 

    Is any thing I am missing related to UART3 port enable?

    Rgds,

    chandra

  • Chandra,

    I'm not a u-boot expert, but I assume the change you made in the board.cfg should change the default console from UART0 to UART3.

    Have you also tried changing the environment using the setenv & saveenv commands per the below instructions in the u-boot README.console doc.

    ________________________________________

    At system startup U-Boot initializes a serial console. When U-Boot relocates itself to RAM, all console drivers are initialized (they will register all detected console devices to the system for further use).

    If not defined in the environment, the first input device is assigned to the 'stdin' file, the first output one to 'stdout' and 'stderr'.

    You can use the command "coninfo" to see all registered console devices and their flags. You can assign a standard file (stdin, stdout or stderr) to any device you see in that list simply by assigning its name to the corresponding environment variable. For example:

        setenv stdin wl_kbd  <- To use the wireless keyboard     setenv stdout video  <- To use the video console

    Do a simple "saveenv" to save the console settings in the environment and get them working on the next startup, too.

    -Mark

  • Chandra,

    In your boards.cfg can you also change CONS_INDEX=1 to CONS_INDEX=4. In older u-boot only one serial port was #defined so the CONS_INDEX would be 1, the first and only serial port. In newer u-boots (like this one) all serial ports are #defined so the CONS_INDEX has to equal the SERIAL. So using SERIAL4,CONS_INDEX=4 should work for you.

    Bin Liu and I were testing this on a Beaglebone Black with USB0/UART2 since that was easy for us to test. So I built am335x_evm_uart2 with the boards.cfg changed to SERIAL3,CONS_INDEX=3. I also modifed arch/arm/cpu/armv7/am33xx/board.c and added to the end of s_init:

    224         /* Enable RTC32K clock */
    225         rtc32k_enable();
    226         sdram_init();
    227         writel(0x3c007000, 0x44e10620);

    You would want to write to 0x44e10628 for USB1/UART3. Bin cut a USB cable and connected it to a serial cable that we attached to a PC. We saw the SPL/u-boot messaged on minicom.

    Steve K.

  • You need to be sure you only apply standard LVCMOS 3.3 volt signal levels to the AM335x USB pins.  A transceiver is required to translate the high voltage UART signals transmitted across the RS-232 cable to the lower voltage LVCMOS levels required by the AM335x device.

    Regards,
    Paul

  • Thanks everyone,

    Now it is working.


    Problem is with CONS_INDEX=3 which i was not setting it to 1.


    So final changes are,

    static void am33xx_usb_set_gpiomode(u8 on, u32 *reg_addr)
    {
        if (on) {
            clrsetbits_le32(reg_addr, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN | GPIO_SIG_INV | GPIO_SIG_CROSS |OTGVDET_EN | OTGSESSENDEN | CHGDET_DIS,
                    GPIOMODE);
        } else {
            clrsetbits_le32(reg_addr, 0, CM_PHY_PWRDN | CM_PHY_OTG_PWRDN);
        }
    }


    and

    Active  arm         armv7          am33xx      ti              am335x              am335x_evm_norboot                   am335x_evm:SERIAL4,CONS_INDEX=4,NOR,NOR_BOOT


    Rgds,

    chandra

  • Hi All,

               Now we want to use USB1 as UART3 for linux and get kernel prints. These are the changes done. But no prints. What is being missed or what is the change required?

    1. In arch/arm/include/debug/omap2plus.S changed

    #ifdef CONFIG_DEBUG_AM33XXUART1
                   ldr     \rp, =AM33XX_UART1_BASE
                     and     \rp, \rp, #0x00ffffff
                     b       97f
    #endif

    to

    #ifdef CONFIG_DEBUG_AM33XXUART1
                   ldr     \rp, =AM33XX_UART4_BASE
                     and     \rp, \rp, #0x00ffffff
                     b       97f
    #endif

    2. In bootargs passing console=console=ttyO3,115200n8

    3.

    diff --git a/code/linux-3.12.10-ti2013.12.01/drivers/usb/phy/phy-am335x-control.c b/code/linux-3.12.10-ti2013.12.01/drivers/usb/phy/phy-am335x-control.c
    index 634f49a..578d561 100644
    --- a/code/linux-3.12.10-ti2013.12.01/drivers/usb/phy/phy-am335x-control.c
    +++ b/code/linux-3.12.10-ti2013.12.01/drivers/usb/phy/phy-am335x-control.c
    @@ -26,6 +26,13 @@ struct am335x_control_usb {
     #define USBPHY_OTGVDET_EN      (1 << 19)
     #define USBPHY_OTGSESSEND_EN   (1 << 20)

    +#define USBPHY_CHGDET_DIS              (1 << 2)
    +#define USBPHY_GPIO_MODE               (1 << 12)
    +#define USBPHY_GPIO_SIG_INV            (1 << 13)
    +#define USBPHY_GPIO_SIG_CROSS          (1 << 14)
    +#define USBPHY_DPGPIO_PD               (1 << 17)
    +#define USBPHY_DMGPIO_PD               (1 << 18)
    +
     #define AM335X_PHY0_WK_EN      (1 << 0)
     #define AM335X_PHY1_WK_EN      (1 << 8)

    @@ -72,24 +79,36 @@ static void am335x_phy_power(struct phy_control *phy_ctrl, u32 id, bool on)
            switch (id) {
            case 0:
                    reg = AM335X_USB0_CTRL;
    +               val = readl(usb_ctrl->phy_reg + reg);
    +               if (on) {
    +                               val &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN);
    +                               val |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN;
    +                       }
    +               else
    +                       {
    +                               val |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
    +                       }
    +
    +               writel(val, usb_ctrl->phy_reg + reg);
                    break;
            case 1:
                    reg = AM335X_USB1_CTRL;
    +               val = readl(usb_ctrl->phy_reg + reg);
    +               if (on) {
    +                               val &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN | USBPHY_CHGDET_DIS | USBPHY_GPIO_SIG_INV | USBPHY_GPIO_SIG_CROSS | USBPHY_DPGPIO_PD | USBPHY_DMGPIO_PD);
    +                               val |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN | USBPHY_GPIO_MODE;
    +                       }
    +               else
    +                       {
    +                               val |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
                                                                                                                                                        

    +                       }
    +
    +               writel(val, usb_ctrl->phy_reg + reg);
                    break;
            default:
                    WARN_ON(1);
                    return;
            }
    -
    -       val = readl(usb_ctrl->phy_reg + reg);
    -       if (on) {
    -               val &= ~(USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN);
    -               val |= USBPHY_OTGVDET_EN | USBPHY_OTGSESSEND_EN;
    -       } else {
    -               val |= USBPHY_CM_PWRDN | USBPHY_OTG_PWRDN;
    -       }
    -
    -       writel(val, usb_ctrl->phy_reg + reg);
     }

     static const struct phy_control ctrl_am335x = {

    4. In dts,

     uart3: serial@481a6000 {
                          status = "okay";

                     };

    5.  usb-phy@47401b00 {

    status = "okay";

    };

    usb@47401800 {

    status = "okay";

    };

    Regards,

    Gangadhar


                             

  • Why:

                ldr     \rp, =AM33XX_UART4_BASE

    Shouldn't it be:

                ldr     \rp, =AM33XX_UART3_BASE

  • Hi Biser,

    Using,

    /* AM33XX serial port */
     #define AM33XX_UART1_BASE       0x44E09000       ---- It means UART0 as per SRM
     #define AM33XX_UART4_BASE       0x481A6000      ----- it means UART3 as per SRM

    Regards,

    Gangadhar

  • OK, you are right. I'm not a software expert.

  • Something else on the hardware side though. I'm not sure that UART3 clock is enabled by default. I seem to remember that in previous Linux versions only UART0 to 2 were enabled initially.

  •  uart3: serial@481a6000 {
                             compatible = "ti,omap3-uart";
                             ti,hwmods = "uart4";
                             clocks = <&dpll_per_m2_div4_ck>;
                             clock-names = "fck";
                             clock-frequency = <48000000>;
                             reg = <0x481a6000 0x2000>;
                             interrupts = <44>;
                             status = "disabled";

                     };

     uart3: serial@481a6000 {
                            status = "okay";
                    };

    By the changes that were suggested previously, uboot prints are available on UART3.

    Regards,

    Gangadhar

  • Hi Biser, etal,

    Any updates on this from your side.

    Regards,

    Gangadhar

  • Gangadhar Gangu said:
    By the changes that were suggested previously, uboot prints are available on UART3.

    This left me with the impression that you have solved your problem.

  • We are able to get it working.

    SDK7.0 not has support for this feature we added that support and it started working.

    Thanks everyone for support.

    Rgds,

    chandra

  • Dear Chandra,

    Could you please let me know how did you set in dts of SDK 7 ie., USB_CTRL1 register i.e, bit 12 GPIO MODE(UART1) to 1 in dts

    even am verifying this feature i.e, USB1 to UART3 for my custom board

    Kindly do the needful

    Awaiting for your replies,

    Many Thanks in advance
  • In dts file,

    1. make "uart3",  "usb-phy"  status "okay".

    2.  make "usb" status "okay" and dr_mode = host.

    In drivers/usb/phy/phy-am335x-control.c,

    in function, am335x_phy_power(), update your usb1 ctrl phy register

    Regards,

    Gangadhar