Hi
Say we are using an external CMOS digital clock through the sys_xtalin pin. In this case, the sys_clkreq is used as an output to request the external system clock.
(1) Page 70 of datasheet – A CMOS digital clock through the sys_xtalin pin. In this case, the sys_clkreq is used as an output to request the external system clock.
Now, I want the same 26MHz clock seen on the sys_clkout1, such that it can be used by a downstream device. As per the Datasheet, we can do so by either SW register control( I donot want to use SW control) or by asserting the sys_clkreq. The downstream device, always needs to see this clock , regardless of the CPU being in Active state or Power down state.
(2) Page 73, In section "4.3 Output Clock Specifications" of the DataSheet, it says -
sys_clkout1 can output the oscillator clock (26 MHz) at any time. It can be controlled by software or externally using sys_clkreq control. When the device is in the off state, the sys_clkreq can be asserted to enable the oscillator and activate the sys_clkout1 without waking up the device. The off state polarity of sys_clkout1 is programmable.
The use of this sys_clkreq as a output for clock request in statement (1) seems confusing to it's use as an input in statement (2).
Am I missing something here? Could someone please explain this.
Thanks,
Pretesh
