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AM335x SPI1 Data receive problem.

Other Parts Discussed in Thread: AM3357

Now i use SPI0 ch0 and SPI1 ch0 in AM3357.

SPI0 ch0 connect to Winbond SPIFLASH.

SPI1 ch0 connect to STMicro EEPROM.

SPI0 ch0 can data transration correctry.

But SPI1 ch0 can't data receive.

Logic analyzer can display correct signal.

Register setting is same with SPI0 ch0. (base address is different.)

Initialize sequence is same with Starterware Example.

How does I drive SPI1 ch0 ? 


HWREG(SOC_CONTROL_REGS + 0x99C) = 0x00000003; // MCASP0_AHCLKR      : fast dis  pd   ena SPI1_CS0
HWREG(SOC_CONTROL_REGS + 0x994) = 0x00000023; // MCASP0_FSX : fast ena pd ena SPI1_D0 (RCV)
HWREG(SOC_CONTROL_REGS + 0x998) = 0x00000003; // MCASP0_AXR0 : fast dis pd ena SPI1_D1 (SND)

*** Data Trans Sequence ***

McSPI1ModuleClkConfig();
McSPIReset(SOC_SPI_1_REGS);
McSPICSEnable(SOC_SPI_1_REGS);
McSPIMasterModeEnable(SOC_SPI_1_REGS);

/* Perform the necessary configuration for master mode.*/
McSPIMasterModeConfig(SOC_SPI_1_REGS, MCSPI_SINGLE_CH, MCSPI_TX_RX_MODE, MCSPI_DATA_LINE_COMM_MODE_1, 0);


McSPIClkConfig(SOC_SPI_1_REGS, 48000000, 400000, 0, MCSPI_CLK_MODE_0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(13), 0);
McSPICSPolarityConfig(SOC_SPI_1_REGS, MCSPI_CS_POL_HIGH, 0);
McSPITxFIFOConfig(SOC_SPI_1_REGS, MCSPI_TX_FIFO_ENABLE, 0);
McSPIRxFIFOConfig(SOC_SPI_1_REGS, MCSPI_RX_FIFO_ENABLE, 0);

snd = 0x00001300;
rcv = 0x00000000;

McSPICSAssert(SOC_SPI_1_REGS, 0);
McSPIChannelEnable(SOC_SPI_1_REGS, 0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(13), 0);
McSPITransfer( (uint32_t*)&snd, (uint32_t*)&rcv, 1);
McSPICSDeAssert(SOC_SPI_1_REGS, 0);
McSPIChannelDisable(SOC_SPI_1_REGS, 0);

snd = 0x1400005A;
rcv = 0x00000000;

McSPICSAssert(SOC_SPI_1_REGS, 0);
McSPIChannelEnable(SOC_SPI_1_REGS, 0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(29), 0);
McSPITransfer( (uint32_t*)&snd, (uint32_t*)&rcv, 1);
McSPICSDeAssert(SOC_SPI_1_REGS, 0);
McSPIChannelDisable(SOC_SPI_1_REGS, 0);

snd = 0x00000000;
rcv = 0x00000000;

McSPICSAssert(SOC_SPI_1_REGS, 0);
McSPIChannelEnable(SOC_SPI_1_REGS, 0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(29), 0);
McSPITransfer( (uint32_t*)&snd, (uint32_t*)&rcv, 1);
McSPICSDeAssert(SOC_SPI_1_REGS, 0);
McSPIChannelDisable(SOC_SPI_1_REGS, 0);

snd = 0x18000000;
rcv = 0x00000000;           

McSPICSAssert(SOC_SPI_1_REGS, 0);
McSPIChannelEnable(SOC_SPI_1_REGS, 0);
McSPIWordLengthSet(SOC_SPI_1_REGS, MCSPI_WORD_LENGTH(29), 0);
McSPITransfer( (uint32_t*)&snd, (uint32_t*)&rcv, 1);
McSPICSDeAssert(SOC_SPI_1_REGS, 0);
McSPIChannelDisable(SOC_SPI_1_REGS, 0);


static void McSPITransfer(unsigned int *p_tx, unsigned int *p_rx,
unsigned int len)
{
while(len)
{
/* Wait till TX is empty. */
while(MCSPI_INT_TX_EMPTY(0) !=
(McSPIIntStatusGet(SOC_SPI_1_REGS) & MCSPI_INT_TX_EMPTY(0)));
McSPITransmitData(SOC_SPI_1_REGS, *p_tx, 0);

p_tx++;

/* Wait till the DATA in RX. */
while(MCSPI_INT_RX_FULL(0) !=
(McSPIIntStatusGet(SOC_SPI_1_REGS) & MCSPI_INT_RX_FULL(0)));
*p_rx = McSPIReceiveData(SOC_SPI_1_REGS, 0);

p_rx++;
len--;
}
}