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C6747 McASP driver in master mode



Hello

 

I've been having some problems in getting the McASP driver running in master mode and both the examples that come with the pspdrivers_01_30_00_06 are in slave mode.

The problem i'm having is the fact that i can control the clock generation, but the framesync generation is not working correctly...

I've tried changing the audio example to see if it had something to do with my project, but the result is the same.

 

Thanks in advance

Sergio Martins

 

Code:



/* ========================================================================== */
/*                            MACRO DEFINITONS                                */
/* ========================================================================== */

/* 0 bit delay from framsync
 * MSB first
 * No extra bit padding
 * Padding bit (ignore)
 * slot Size is 16
 * Reads from DMA port
 * NO rotation
 */
#define I2S_FMT    (CSL_FMKT (MCASP_RFMT_RDATDLY, 0BIT) | \
                CSL_FMKT (MCASP_RFMT_RRVRS, MSBFIRST) | \
                CSL_FMKT (MCASP_RFMT_RPAD, ZERO) | \
                CSL_FMKT (MCASP_RFMT_RSSZ, 16BITS) | \
                CSL_FMKT (MCASP_RFMT_RBUSEL, VBUSP) | \
                CSL_FMKT (MCASP_RFMT_RROT, NONE))               
                   
/* I2S/TDM mode,
 * Frame sync is one word
 * Rising edge is start of frame
 * externally generated frame sync
 */
#define I2S_AFSCTL (CSL_FMKT (MCASP_AFSRCTL_RMOD, I2S) | \
                    CSL_FMKT (MCASP_AFSRCTL_FRWID, WORD) | \
                    CSL_FMKT (MCASP_AFSRCTL_FSRM, INTERNAL) | \
                    CSL_FMKT (MCASP_AFSRCTL_FSRP, RISINGEDGE))

#define I2S_ACLKCTL        0x00000024
#define I2S_AHCLKCTL    0x0000800F

#define I2S_BUFFER_SIZE     160 // bytes

/* ========================================================================== */
/*                              GLOBAL VARIABLES                              */
/* ========================================================================== */

/* Buffer alignement is required when working in DMA Mode */
#pragma DATA_ALIGN(i2sWriteBuffer, 128);
Uint8  i2sWriteBuffer[2*I2S_BUFFER_SIZE];
#pragma DATA_ALIGN(i2sReadBuffer, 128);
Uint8  i2sReadBuffer[2*I2S_BUFFER_SIZE];

Mcasp_HwSetupData mcasp0RcvSetup = {
        /* .rmask    = */ 0xFFFFFFFF, /* All the data bits are to be used     */
        /* .rfmt     = */ I2S_FMT,
        /* .afsrctl  = */ I2S_AFSCTL,
        /* .rtdm     = */ 0x00000003, /* slot 1,2 is active (I2S)             */
        /* .rintctl  = */ 0x00000003,//3, /* sync error and overrun error         */
        /* .rstat    = */ 0x000001FF, /* reset any existing status bits       */
        /* .revtctl  = */ 0x00000000, /* DMA request is enabled or disabled   */
        {
             /* .aclkrctl  = */ I2S_ACLKCTL,
             /* .ahclkrctl = */ I2S_AHCLKCTL,
             /* .rclkchk   = */ 0x00000000
        }
} ;

/* McBsp channel parameters                                  */
Mcasp_ChanParams  mcasp0_chanparamIN =
{//INPUT
    0x0001,                    /* number of serialisers      */
    {Mcasp_SerializerNum_11, }, /* serialiser index           */
    &mcasp0RcvSetup,
    TRUE,
    Mcasp_OpMode_TDM,          /* Mode (TDM/DIT)             */
    Mcasp_WordLength_16,
    NULL,
    0,
    NULL,
    NULL,
    2,                        /* number of TDM channels      */
    Mcasp_BufferFormat_1SER_MULTISLOT_NON_INTERLEAVED,
    TRUE,
    TRUE
};

Mcasp_HwSetupData mcasp0XmtSetup = {
        /* .xmask    = */ 0xFFFFFFFF, /* All the data bits are to be used     */
        /* .xfmt     = */ I2S_FMT,
        /* .afsxctl  = */ I2S_AFSCTL,
        /* .xtdm     = */ 0x00000003, /* slot 1,2 is active (I2S)             */
        /* .xintctl  = */ 0x00000003,//7, /* sync error,overrun error,clK error   */
        /* .xstat    = */ 0x000001FF, /* reset any existing status bits       */
        /* .xevtctl  = */ 0x00000000, /* DMA request is enabled or disabled   */
        {
             /* .aclkxctl  = */ I2S_ACLKCTL,
             /* .ahclkxctl = */ I2S_AHCLKCTL,
             /* .xclkchk   = */ 0x00000000
        },

};

Mcasp_ChanParams  mcasp0_chanparamOUT =
{//OUTPUT
    0x0001,                   /* number of serialisers       */
    {Mcasp_SerializerNum_13,},
    &mcasp0XmtSetup,
    TRUE,
    Mcasp_OpMode_TDM,
    Mcasp_WordLength_16,      /* word width                  */
    NULL,
    0,
    NULL,
    NULL,
    2,                        /* number of TDM channels      */
    Mcasp_BufferFormat_1SER_MULTISLOT_NON_INTERLEAVED,
    TRUE,
    TRUE
};


/* handle to the input and output streams                 */
SIO_Handle  mcasp0StreamIN  = NULL;
SIO_Handle  mcasp0StreamOUT  = NULL;

/*
 * Mcasp device params. To be filled in McaspUserInit function which
 * is called before driver creation
 */
Mcasp_Params mcasp0Params;

/* ========================================================================== */
/*                           FUNCTION DEFINITIONS                             */
/* ========================================================================== */

/*
 * Mcasp init function called when creating the driver.
 */
void Mcasp0UserInit(void)
{
    /* power on the Mcasp 2 instance in the PSC   */
    //Psc_ModuleClkCtrl(Psc_DevId_1, CSL_PSC_MCASP0, TRUE);

    Mcasp_init();

    /* configure the parameters for the I2S/TDM mode of Mcasp instance 0 */
    mcasp0Params = Mcasp_PARAMS;
    mcasp0Params.hwiNumber = 8;
    mcasp0Params.enablecache = TRUE;

    mcasp0Params.mcaspHwSetup.glb.pdir = 0x1C000000;
    mcasp0Params.mcaspHwSetup.glb.ditCtl= 0;
    mcasp0Params.mcaspHwSetup.rx.clk.clkSetupHiClk = I2S_AHCLKCTL;
    mcasp0Params.mcaspHwSetup.rx.clk.clkSetupClk   = I2S_ACLKCTL;
    mcasp0Params.mcaspHwSetup.rx.frSyncCtl = I2S_AFSCTL;
    mcasp0Params.mcaspHwSetup.rx.fmt = I2S_FMT;
    mcasp0Params.mcaspHwSetup.tx.clk.clkSetupHiClk = I2S_AHCLKCTL;
    mcasp0Params.mcaspHwSetup.tx.clk.clkSetupClk   = I2S_ACLKCTL;
    mcasp0Params.mcaspHwSetup.tx.frSyncCtl = I2S_AFSCTL;
    mcasp0Params.mcaspHwSetup.tx.fmt = I2S_FMT;
}

void Mcasp0Transfers(void)
{
    Int16 nmadus[2] = {0,0}, ping = 0;
    Ptr rcv,xmt;
    SIO_Attrs sioAttrs;

    sioAttrs       = SIO_ATTRS;
    sioAttrs.nbufs = 8;
    sioAttrs.align = 128;
    sioAttrs.model = SIO_ISSUERECLAIM;

    mcasp0_chanparamIN.edmaHandle = edmaGetHandle();
    mcasp0_chanparamOUT.edmaHandle = edmaGetHandle();

    /* open the I/O streams */
    mcasp0StreamOUT = SIO_create("/dioMcasp0OUT", SIO_OUTPUT, I2S_BUFFER_SIZE, &sioAttrs);
    mcasp0StreamIN = SIO_create("/dioMcasp0IN", SIO_INPUT, I2S_BUFFER_SIZE, &sioAttrs);

    if ( (mcasp0StreamIN == NULL) || (mcasp0StreamOUT == NULL) )
    {
        LOG_printf(&trace,"\r\nCreate I2S stream FAILED.");
        return;
    }

    memset(i2sReadBuffer, 0, I2S_BUFFER_SIZE);
    memset(i2sWriteBuffer, 0x55, I2S_BUFFER_SIZE);

    /* Issue an empty/full buffer to the input/output stream */
    if ((SIO_issue(mcasp0StreamIN, (Ptr *)&i2sReadBuffer[ping * I2S_BUFFER_SIZE], I2S_BUFFER_SIZE/2, NULL) != SYS_OK) ||
        (SIO_issue(mcasp0StreamOUT, (Ptr *)&i2sWriteBuffer[ping * I2S_BUFFER_SIZE], I2S_BUFFER_SIZE/2, NULL) != SYS_OK))
    {
        LOG_printf(&trace,"\r\nFailed to issue empty buffer to stream\n");
    }


    while (1)
    {
        ping ^= 1;//Change the buffers used by the driver

        /* Issue an empty/full buffer to the input/output stream */
        if ((SIO_issue(mcasp0StreamIN, (Ptr *)&i2sReadBuffer[ping * I2S_BUFFER_SIZE], I2S_BUFFER_SIZE/2, NULL) != SYS_OK) ||
            (SIO_issue(mcasp0StreamOUT, (Ptr *)&i2sWriteBuffer[ping * I2S_BUFFER_SIZE], I2S_BUFFER_SIZE/2, NULL) != SYS_OK))
        {
            LOG_printf(&trace,"\r\nFailed to issue empty buffer to stream\n");
        }

        /* Reclaim full buffer from the input stream                          */
        nmadus[0] = SIO_reclaim(mcasp0StreamIN, (Ptr *)&rcv, NULL);
        /* Reclaim empty buffer from the output stream to be reused           */
        nmadus[1] = SIO_reclaim(mcasp0StreamOUT, (Ptr *)&xmt, NULL);
        if ((nmadus[0] < 0) || (nmadus[1] < 0))
        {
            LOG_printf(&trace,"\r\nError reclaiming empty buffer from the output stream");
        }


    }
}


  • Hi,

     

    I have the following queries

     

    1.     Are you trying this on the C6747 EVM or a custom Board?

    2.     If it is a custom board, what is the device/codec you are interfacing to?

    3.     Can you please tell me in detail the  problem you are facing(with respect to frame sync generation)?

     

    Also, in the latest PSP driver release (1.30.00) there is an example demonstrating an EVM-EVM communication using McASP. Here one of the Mcasp is configured as master and the other is configured as slave. Please refer to this.

     

    You can download the latest package from the following link

     

    http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/bios_psp/BIOSPSP/01_30/index_FDS.html

     

     

    Thanks & Regards,

    Imtiaz SMA

  • 1 - I'm trying this on the evm but the final target will be a custom board.

    2 - The other device will be a I2S slave.

    3 - The problem is that after the SIO_create, the bit clock is correctly configured (has the correct frequency) but the frame sync is not correctly configured. Furthermore, when i pause the execution of the program the frame sync shows up ok. There is something in the driver structure that creates this behaviour. I am not defining any functions or any other thing that might disturb the driver execution. The only thing i do is on the source file SIO_create -> SIO_submit -> SIO_reclaim.

     

    I could not find the example you mentioned, could you give me the path to it?

    I only found the examples in pspdrivers_01_30_00_06\packages\ti\pspiom\examples\evm6747 and they are both master (and also only one is TDM)...

  • Hi,

    For the above mentioned example you would have to download the latest psp package (latest version is 1.30.00) from the link i have given earlier.

    Once you have installed the package you should be able to find the example at

    pspdrivers_01_30_00\packages\ti\pspiom\examples\evm6747\mcasp

    regards,

    imtiaz