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audio

Hi, we use DM8168 Evm, RDK4.0, AIC3101.
The audio is DSP Mode now, how can I set to I2S mode?
where I can change?
I change ti81xx_evm_hw_params() fmt to SND_SOC_DAIFMT_I2S_WORD16.
And add
static int davinci_mcasp_set_dai_fmt(struct snd_soc_dai *cpu_dai,
      unsigned int fmt)
{
 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
 void __iomem *base = dev->base;

 
 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  
 case SND_SOC_DAIFMT_I2S:
        /* codec is using i2s data format 32bits */ 
  mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, 0x00000111);  
  mcasp_set_bits(base + DAVINCI_MCASP_RXTDM_REG, 0x00000003);

        mcasp_set_bits(base + DAVINCI_MCASP_RXFMT_REG, 0x000180F4);
  mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
     break;

 
 case SND_SOC_DAIFMT_I2S_WORD16:
  //codec is using i2s data format 16 bits
  mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, 0x00000111);
  mcasp_set_bits(base + DAVINCI_MCASP_RXTDM_REG, 0x00000003);
  mcasp_set_bits(base + DAVINCI_MCASP_RXFMT_REG, 0x00018074);
  mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
 default:
        //we don't use i2c - so we need to take care about the frame/bitclk behaviour
        switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
                case SND_SOC_DAIFMT_IB_NF:
                     mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
                     mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
 
                     mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
                     mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
                break;

                case SND_SOC_DAIFMT_NB_IF:
                     mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
                     mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
 
                     mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
                     mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
                break;
 
                case SND_SOC_DAIFMT_IB_IF:
                     mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
                     mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
 
                     mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
                     mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
                break;
 
                case SND_SOC_DAIFMT_NB_NF:
      mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXPOL);
      mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, FSXPOL);
 
      mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRPOL);
      mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, FSRPOL);
    break;
 
    default:
     return -EINVAL;
   }
 }
 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
 case SND_SOC_DAIFMT_CBS_CFS:
  /* codec is clock and frame slave */
  mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
  mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE);

  mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
  mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);

  mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x7 << 26));
  break;
 case SND_SOC_DAIFMT_CBM_CFS:
  /* codec is clock master and frame slave */
  mcasp_set_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
  mcasp_set_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE);

  mcasp_set_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
  mcasp_set_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);

  mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, (0x2d << 26));
  break;
 case SND_SOC_DAIFMT_CBM_CFM:
  /* codec is clock and frame master */
  mcasp_clr_bits(base + DAVINCI_MCASP_ACLKXCTL_REG, ACLKXE);
  mcasp_clr_bits(base + DAVINCI_MCASP_TXFMCTL_REG, AFSXE);

  mcasp_clr_bits(base + DAVINCI_MCASP_ACLKRCTL_REG, ACLKRE);
  mcasp_clr_bits(base + DAVINCI_MCASP_RXFMCTL_REG, AFSRE);

  mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, (0x3f << 26));

  /* TI811x AIC_MCLK <-- McASP2_AHCLKX(Pin out) */
  switch (dev->clk_input_pin) {
  case MCASP_AHCLKX_IN:
   mcasp_clr_bits(base + DAVINCI_MCASP_PDIR_REG, AHCLKX);
   break;
  case MCASP_AHCLKX_OUT:
   mcasp_set_bits(base + DAVINCI_MCASP_PDIR_REG, AHCLKX);
   break;
  default:
   return -EINVAL;
  }
  break;

 default:
  return -EINVAL;
 }
 
 But if I use arecord, there print arecord: pcm_read:1801: read error: Input/output error.