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McBSP interface related query

Sudarshan KR
Intellectual 840 points

Other Parts Discussed in Thread: AM1808

I am trying to interface O/P of the  demodulator chip  to the McBSP interface. My question here is with regard to Frame sync signal. Is it possible to interface only the clock signal and the Serial Data signal to interface to McBSP and ignore the frame sync signal

Since the kind of Frame sync the MCBSP is expecting cannot be generated from the demodulator chip.

The kind of Control signal which comes out of Demod chip is either valid signal which is high for around 190 serial bytes of data or one pulse signal which comes at the begining of data for one clock signal

The ARM Chipset which is being referred here is AM1808. Does AM1808 supports any 656/601 based interface support apart from the uPP interface it has

  • 0
    TI__Guru**** 393215 points

    Moving this to the AM18X forum.

  • 0
    TI__Mastermind 35645 points

    Hi Sudharshan,

    Thanks for your post.

    In my opinion, violating frame sync will not work for the serial data to interface to McBSP and you just cannot ignore the frame sync signal.

    A UI card is included with the AM1808 EVM Development kit which has possible peripherals listed below:

    • LCD character display
    • EMAC RMII interface
    • Camera (image sensor)
    • Push button switches
    • UPP ADC/DAC
    • Parallel NOR flash memory
    • NAND flash memory
    • Video Port Interface (composite, S-Video)

    May be, you could check the below wiki resource for more info. on AM1808:

    http://processors.wiki.ti.com/index.php/AM_1808_Introductory_Information

    Thanks & regards,

    Sivaraj K

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  • 0 in reply to Sivaraj Kuppuraj
    Intellectual 840 points

    Hi Sivaraj,

    Thanks for your feedback.

    I will explain a little more on this design. Actually our serial data can provide sync kind of signal but it is high for all the 8 bits. but in actual McBSP requiement  the Fsync has to be high for one clock pulse before the transmission of data begins. We have already utilised the uPP interface for other 2 interfaces  and we were short of one more port. Since the kind of Fsync on McBSP is very rigid, that was the reason for asking me if we could ignore the Fsync pulses.

    Regards,

    Sudarshan