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SDRAM_CONFIG Register in AM3352

Other Parts Discussed in Thread: AM3352

Hi,

We are planning to use AM3352 in our design.

As a first step I am trying to understand the SDRAM Configurations.

I had referred the following wiki: http://processors.wiki.ti.com/index.php/AM335x_DDR_PHY_register_configuration_for_DDR3 and I am having the following queries

  • On what basis do we have to configure SDRAM_CONFIG[REG_DDR_TERM, REG_DYN_ODT, REG_SDRAM_DRIVE]
  • Is REG_DDR2_DDQS is not applicable for DDR3? In that case should we program 0?
  • In the wiki page the optimized values for in Step 3 and programmed values in Step 4 are different
  • On what basis ZQ_CONFIG need to be programmed?
  • The gel file given in the Wiki page can be used for AM3352 also?

Thanks for your time and reading it.

Regards,

GSR