AM3352 unable to resume from DeepSleep0

nitesh chowdhary

Other Parts Discussed in Thread: AM3352, AM3359, AM3354

Hi,

I have a AM3352 based custom board , i am trying to manually suspend and resume the system , I referred the below link to do so.

http://processors.wiki.ti.com/index.php/Sitara_Linux_Training:_Power_Management#Suspend_.2F_Resume

The system is going into Deeepsleep0 mode but I am unable to resume from the suspend mode . I used UART0 as an interrupt to resume from suspend mode.

The log is as follows.

root@RANA-AM335x:~ sync

root@RANA-AM335x:~ echo mem > /sys/power/state
[ 236.915649] PM: Syncing filesystems ... done.
[ 236.927215] Freezing user space processes ... (elapsed 0.01 seconds) done.
[ 236.948730] Freezing remaining freezable tasks ... (elapsed 0.01 seconds) done.
[ 236.968780] Suspending console(s) (use no_console_suspend to debug)

....it gets stuck here.

how to resolve this?

It works well in our AM3354 and AM3359 based custom boards.

i am using latest EZSDK release PSP 04.06.00.11.

regards

Nitesh

over 11 years ago

0 Biser Gatchev-XID over 11 years ago

TI__Guru**** 393215 points

Hi Nitesh,

There are no differences between the AM335X processors regarding low-power modes. Please compare your schematics, more particularly the DDR part of the schematic, with the functioning boards. Check specifically that DDR_CKE has an external pulldown resistor and no Vtt termination resistor.

0 nitesh chowdhary over 11 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Hi biser,

Well i compared the schematics, and it looks fine to me, i am sharing you the picture of DDR part.

Is there anything else i need to look at.?

regards

Nitesh

0 Biser Gatchev-XID over 11 years ago in reply to nitesh chowdhary

TI__Guru**** 393215 points

From what I see the termination method you are using is not the one recommended in the AM335X Datasheet, Rev. F, section 5.6.2.3. Furthermore DDR_CKE is terminated. This signal must not be terminated. It should have only a 10kOhm pulldown resistor. See http://processors.wiki.ti.com/index.php/AM335x_Schematic_Checklist#DDR3

0 nitesh chowdhary over 11 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

Hi biser,

Well looking at the datasheet, i feel that we are not using the recommended method. But as i said in my earlier post, the schematic of DDR part is same for all the AM335x based boards which we have ,only the RAM size differs.

Can you please confirm what is possible reason that it is working in other boards (AM3354 with 256M ram) .?

0 Biser Gatchev-XID over 11 years ago in reply to nitesh chowdhary

TI__Guru**** 393215 points

The DDR_CKE signal is key factor. It should go low, to place the DDR in self-refresh during DeepSleep. Valid input signal levels should be taken from the DDR datasheet.

0 nitesh chowdhary over 11 years ago in reply to Biser Gatchev-XID

Intellectual 460 points

thanks biser for the info.

regards

NItesh

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AM3352 unable to resume from DeepSleep0