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am3359 mcasp speed

Other Parts Discussed in Thread: AM3359, SYSBIOS

I am working on am3359 and sys/bios,the manual says the function clock of mcasp is about 25Mhz.

but when i configure my mcasp with fifo mode and use edma to sevice transfer and receive.

when the CLKR or CLKX is 10Mhz~25Mhz,there is a lot errors, when i slower down to 6Mhz, it seems OK,

i didnot know why. my edma buffers are locate in section in DDR3 which i define as io(no cache). 

i also try define my edma buffers as nomal,and do a cache wbinv(), this didnot solve my problems. 

  • What version of SYSBIOS are you using?

    How big are your buffers that you are transferring?  And What do you mean when you say "there is a lot of errors"?

    Judah

  • MY sys/bios is 6.35.4.50

    i configure mcasp in burst mode,my aim is use mcasp to transfer data form arm to fpga.

    i use cpu to sevice the fifo,

    this is my initiate code is :

    McASPRxReset(SOC_MCASP_0_CTRL_REGS);
        McASPTxReset(SOC_MCASP_1_CTRL_REGS);

        /* Enable the FIFOs for DMA transfer */
        McASPReadFifoEnable(SOC_MCASP_0_FIFO_REGS, 4, 1);
        McASPWriteFifoEnable(SOC_MCASP_1_FIFO_REGS, 4, 1);


        McASPTxFmtMaskSet(SOC_MCASP_1_CTRL_REGS, (1 << WORD_SIZE) - 1);

        /* Set the transmit format unit for I2S */
        McASPTxFmtSet(SOC_MCASP_1_CTRL_REGS, (MCASP_TX_PAD_WITH_0 | MCASP_TX_BITSTREAM_LSB_FIRST
                                    | MCASP_TX_SYNC_DELAY_0BIT | (0 << 2)
                                    | ((SLOT_SIZE/2 -1) << MCASP_XFMT_XSSZ_SHIFT)
                                    | MCASP_TX_MODE_DMA));

        McASPTxFrameSyncCfg(SOC_MCASP_1_CTRL_REGS, 0, MCASP_TX_FS_WIDTH_BIT,
           MCASP_TX_FS_INT_BEGIN_ON_RIS_EDGE);


        McASPRxFmtMaskSet(SOC_MCASP_0_CTRL_REGS, (1 << WORD_SIZE) - 1);

           /* Set the transmit format unit for I2S */
        McASPRxFmtSet(SOC_MCASP_0_CTRL_REGS, (MCASP_RX_PAD_WITH_0 | MCASP_RX_BITSTREAM_LSB_FIRST
                                       | MCASP_RX_SYNC_DELAY_0BIT | (0 << 2)
                                       | ((SLOT_SIZE/2 -1) << MCASP_XFMT_XSSZ_SHIFT)
                                       | MCASP_RX_MODE_DMA));


        /* Configure the frame sync. I2S shall work in TDM format with 2 slots */
        McASPRxFrameSyncCfg(SOC_MCASP_0_CTRL_REGS, 0, MCASP_RX_FS_WIDTH_BIT,   //MCASP_RX_FS_WIDTH_WORD
           MCASP_RX_FS_EXT_BEGIN_ON_RIS_EDGE);

        /* configure the clock for receiver */
       // McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS,  MCASP_RX_CLK_INTERNAL, 0, 0);
        McASPRxClkCfg(SOC_MCASP_0_CTRL_REGS,  MCASP_TX_CLK_INTERNAL, 0, 0);
        McASPRxClkPolaritySet(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_POL_FALL_EDGE);
        McASPRxClkCheckConfig(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLKCHCK_DIV32,
                              0x00, 0xFF);

        /* configure the clock for transmitter */
        McASPTxClkCfg(SOC_MCASP_1_CTRL_REGS, MCASP_TX_CLK_INTERNAL,0,0);
        McASPTxClkPolaritySet(SOC_MCASP_1_CTRL_REGS, MCASP_TX_CLK_POL_FALL_EDGE);
        McASPTxClkCheckConfig(SOC_MCASP_1_CTRL_REGS, MCASP_TX_CLKCHCK_DIV32,
                              0x00, 0xFF);
        WRREG(SOC_MCASP_1_CTRL_REGS + MCASP_AFSXCTL)|= 1<<(1u);

        /* Enable the transmitter/receiver slots. I2S uses 2 slots */
        McASPRxTimeSlotSet(SOC_MCASP_0_CTRL_REGS, 1);
        McASPTxTimeSlotSet(SOC_MCASP_1_CTRL_REGS, 1);

        /*
        ** Set the serializers, Currently only one serializer is set as
        ** transmitter and one serializer as receiver.
        */
        McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX0);
     McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX1);
     McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX2);
     McASPSerializerRxSet(SOC_MCASP_0_CTRL_REGS, MCASP_XSER_RX3);

        McASPSerializerTxSet(SOC_MCASP_1_CTRL_REGS, MCASP_XSER_TX0);
        McASPSerializerTxSet(SOC_MCASP_1_CTRL_REGS, MCASP_XSER_TX1);
        McASPSerializerTxSet(SOC_MCASP_1_CTRL_REGS, MCASP_XSER_TX2);
        McASPSerializerTxSet(SOC_MCASP_1_CTRL_REGS, MCASP_XSER_TX3);

        McASPPinMcASPSet(SOC_MCASP_0_CTRL_REGS, 0xFFFFFFFF);
        WRREG(SOC_MCASP_0_CTRL_REGS + MCASP_PFUNC) |= 1<<(26u);
     McASPPinMcASPSet(SOC_MCASP_1_CTRL_REGS, 0xFFFFFFFF);

     /*mcasp1 pin fsr as gpio0  */
     WRREG(SOC_MCASP_1_CTRL_REGS + MCASP_PFUNC) |= 1<<(31u);

     /* mcasp 0 pin mux initiation*/
        McASPPinDirInputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_AXR(MCASP_XSER_RX0)
              | MCASP_PIN_AXR(MCASP_XSER_RX1)
              | MCASP_PIN_AXR(MCASP_XSER_RX2)
              | MCASP_PIN_AXR(MCASP_XSER_RX3)
                 //| MCASP_PIN_ACLKR
                 | MCASP_PIN_AFSR );//lfc

        McASPPinDirOutputSet(SOC_MCASP_0_CTRL_REGS, MCASP_PIN_ACLKR);

       // McASPPinDirInputputSet(SOC_MCASP_1_CTRL_REGS, MCASP_PIN_ACLKR);
     /* mcasp 1 pin mux initiation*/
        McASPPinDirOutputSet(SOC_MCASP_1_CTRL_REGS, MCASP_PIN_AXR(MCASP_XSER_TX0)
              | MCASP_PIN_AXR(MCASP_XSER_TX1)
              | MCASP_PIN_AXR(MCASP_XSER_TX2)
              | MCASP_PIN_AXR(MCASP_XSER_TX3)
                 | MCASP_PIN_ACLKX
                // | MCASP_PIN_ACLKR
                 | MCASP_PIN_AFSX );//lfc

      memcpy((void *)(SOC_MCASP_1_DATA_REGS),
                            (void *)TestBuffer,
                            44*4);
                         


        numfifo=HWREG(SOC_MCASP_1_FIFO_REGS+0x4);

        McASPRxSerActivate(SOC_MCASP_0_CTRL_REGS);

        McASPTxSerActivate(SOC_MCASP_1_CTRL_REGS);

        /* Activate the state machines */
        McASPRxEnable(SOC_MCASP_0_CTRL_REGS);
        McASPTxEnable(SOC_MCASP_1_CTRL_REGS);


        McASPRxClkStart(SOC_MCASP_0_CTRL_REGS, MCASP_RX_CLK_INTERNAL);
        McASPTxClkStart(SOC_MCASP_1_CTRL_REGS, MCASP_TX_CLK_INTERNAL);

    I have fewer question, the datasheets means there a fifo size of 64 words for each mcasp,but when i use

    memcpy((void *)(SOC_MCASP_1_DATA_REGS),
                            (void *)TestBuffer,
                            800);

    i can write more than 64 words ,and i can also see the data output in axr pins. so i wonder what size of the fifo?

    also, i set up mcasp work in burst mode, every time i want thransfer data, i just use memcpy to copy my data to mcasp fifo,but i find there always some data lost, mcasp clk is 24MHZ,

    i do not want use EDMA with mcasp,  can you tell the right way to write data to the fifo when thransfer,and read data form fifo when receive?? 

    can you help me ? i am very hurry, it is very important to use mcasp to transfer data in my project.