Hello TI' teams.
At company developed board with DM8148 silicon rev.3.0 and Marvell PHY 88E1512.
Our board has only single external ethernet PHY connected to EMAC0. Pins from EMAC1 aren't used and aren't connected to external PHY,
but connected to board expansion connector for future projects and boards agregations.
Currently I working on board bring-up and BSP porting from Mistral EVM to our custom board.
As software platform used dvr-rdk latest version.
u-boot.min and u-boot both looked works fine - board booted from NAND and I have an u-boot prompt.
On u-boot level (from u-boot console) etherner - EMAC and PHY works fine too, even on 1000M speed - I can load kernel via TFTP, can ping to my development PC, can obtain ip address on dhcp command. At board hasn't EEPROM and MAC adress taken from EFUSE, so we use MAC burned by TI.
When kernel start executing I have a problem with ethernet connectivity on my board - board stop sends network packets. I watched this issue with WireShark and saw that TFTP acknowledgement packets (load kernel via TFTP) was last packets sended by my board. After start of kernel - network completely not worked, NFS mount (mount root file system via NFS in kernel) not worked too. But kernel always detect PHY[0] device and read proper PHY ID = 0x1410dd1.
For kernel configuration used ti8148_evm_defconfig file with single changes - 10M/100M speed allowed too in network driver configuration.
I would be very grateful if you could help me solve this problem.
Please let me know:
1) After proper pin-mux from u-boot, is kernel internally modify the pin-mux setting? We have custom pin-mux setting different from Mistral EVM. I guess kernel after start overwrite my pin-mux from u-boot and network driver hangs.
2) What kind of source clock used by CPSW driver?
3) our u-boot disable the internal clocks delay by GMII_SEL register, is CPSW driver disable the delay too by default?
4) CPSW driver by default config PHY to RGMII or GMII mode? Single or dual EMAC? on my board PHY need to works in RGMII mode.
I insert some prints from CPSW driver in function "cpsw_set_phy_config()" [drivers/net/cpsw.c] and recieve a very strange result:
CPSW phy found successfully, reads correct PHY ID, but function miibus->read() always return me zero value. This is code fragment with my prints:
===================================================================
static void cpsw_set_phy_config(struct cpsw_priv *priv, struct phy_device *phy)
{
struct cpsw_platform_data *pdata = priv->pdev->dev.platform_data;
struct mii_bus *miibus = NULL;
int phy_addr = 0;
int err = 0;
u16 val = 0;
u16 tmp = 0;
u16 page = 0;
if (!pdata->gigabit_en)
return;
if (!phy)
return;
miibus = phy->bus;
if (!miibus)
return;
phy_addr = phy->addr;
/* Following lines enable gigbit advertisement capability even in case
* the advertisement is not enabled by default
*/
printk(KERN_NOTICE "[SCP]: cpsw_set_phy_config() phy_mask = x%08X\n", miibus->phy_mask);
val = miibus->read(miibus, phy_addr, MII_BMCR);
//MRT
printk(KERN_NOTICE "[SCP]: PHY[%d] read MII_BMCR = x%04X. miibus->state = %d\n", phy_addr, val, miibus->state);
//
val |= (BMCR_SPEED100 | BMCR_ANENABLE | BMCR_FULLDPLX);
err = miibus->write(miibus, phy_addr, MII_BMCR, val);
printk(KERN_NOTICE "[SCP]: PHY[%d] write x%04X. miibus->write() return %d\n", phy_addr, val, err);
//MRT software reset for perform update (Marvell spec. request)
val |= BMCR_RESET;
miibus->write(miibus, phy_addr, MII_BMCR, val);
printk(KERN_NOTICE "[SCP]: PHY[%d] write x%04X. miibus->write() return %d\n", phy_addr, val, err);
udelay(5);
tmp = miibus->read(miibus, phy_addr, MII_BMCR);
//MRT
printk(KERN_NOTICE "[SCP]: PHY[%d] read MII_BMCR = x%04X. miibus->state = %d\n", phy_addr, tmp, miibus->state);
//
===================================================================
And this is prints from terminal:
============================================
CPSW phy[0] found : id is : 0x1410dd1
[SCP]: cpsw_set_phy_config() phy_mask = xFFFFFFFE
[SCP]: PHY[0] read MII_BMCR = x0000. miibus->state = 2
[SCP]: PHY[0] write x3100. miibus->write() return 0
[SCP]: PHY[0] write xB100. miibus->write() return 0
[SCP]: PHY[0] read MII_BMCR = x0000. miibus->state = 2
[SCP] phy_connect 0:01
PHY 0:01 not found
Sending DHCP requests .....
=============================================
5) I don't clearly understood why miibus->read() into cpsw_set_phy_config() always return me zero value? I guess this function is not works properly, so my PHY[0] hasn't correct setting by CPSW driver after reset in kernel. But unfortunatelly I don't know how to fix the problem - I'm not familiar with CPSW driver.
Please answer me and help to fix the problems.
Thank you very much and best regards!
