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TMS320C6678 combine srio hyperlink and pcie

Other Parts Discussed in Thread: TMS320C6678

Dear proffessor,

  Recently,I am doing a job that combining  the srio、hyperlink and pcie project together. I meet a problem that is the RC  can not receive the interrupt coming from the EP ,but the buffer has the right data. The RC stops at the address which belongs to the csl_vect section, this section is generated only  by the hyperlink. So,I doute if the hyperlink interrupt has a impact on the pcie.What is more, the pcie project is based on the sys/bios.I need you help.Thans very much! The picture blow shows the RC stop address.

  • Hi chuanjiang,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

    Please help with below questions to support you.

    1. Are you working on EVM or Custom board?

    2. Please provide MCSDK version and package information.

    3. Please confirm you DSP part number. TMS320C6678 has only 8 cores but your screen shot shows more than 8 cores.

    Thanks.

  • Hi TI employee,

    Thanks for your answers!

    Here,I have some details to tell you.

    I do not use the EVM,I use my own board .There are 4 TMS320C6678 dsps on my board. I am testing the hyperlink and pcie between dsp1 and dsp2, the hyperlink and pcie are in one project. Firstly,dsp1 (use core0) sends 1 GB data to dsp2(use core0) through hyperlink,the dsp2 responses the hyperlnk interrupt and move the data to 0xc000 0000-0xffff ffff.  Then,dsp2 sends the received data to dsp1 through pcie,the pcie link is up,but dsp1 can not response the interrupt ,the hwi_isr() does not execute.The mcsdk version is mcsdk_2_01_02_06,the pdk version is pdk_c6678_1_1_2_6(you can see the pictures blow).

    I set a breakpoint at line 1121,at this time the dsp1 stops at the getlink() founction,ant this is normal,but when the dsp2 runs to line 1123,that is the dsp2 sends a msi interrupt0 to dsp1,the dsp1 stops at _csl_intcIsrDispatch.asm,so the dsp1 can not response the msi interrupt0.I do not know why ,and how can I slove this problem. Thanks you!

     

    Regrads!

    chuanjiang xiao

  • Hi Chuanjiang,

    For my understanding, you have configured DSP1 as RC and DSP2 as EP. Is it correct?

    I think problem in RC side interrupt routing section. please share your interrupt routing code.

    Thanks,

  • Thank you for your answers!

    Yes, you are right! Dsp1 is RC,and DSP2 is EP! In the bios datasheet I see "Hwis must not use the Chip Support Library (CSL) for the target",so I doubt wether the csl_intc can not be used with the bios. In the  attached file is my ccs project ,you can see the code and help me to find out what is the problem. Thank you very much!

    Best Regards!3660.multi_test_send_dsp1_1[1].rar6330.multi_test_recv_dsp2_1[1].rar

    chuanjiang xiao

  • Hi Chuanjiang,

    For my understanding, you have missed the MSI interrupt routing on your test code. Please review your code once again and add the MSI interrupt routing function.

    I have attached the reference code for MSI interrupt routing function. Please take a reference and develope your code.

    CSL_IntcContext             intcContext;
    CSL_IntcEventHandlerRecord  EventHandler[30];
    CSL_IntcGlobalEnableState   state;
    CSL_IntcParam               vectIdMsi;
    CSL_IntcObj                 intcObjMsi;
    CSL_IntcHandle              hTestMsi;
    CSL_IntcEventHandlerRecord  EventRecord;
    
    //MSI Interrupt Handler
    static void msi_irq_handler (void* Handle)
    {
    	.....
    }
    
    //MSI interrupt routing
    {
       	/* INTC module initialization */
       	intcContext.eventhandlerRecord = EventHandler;
       	intcContext.numEvtEntries      = 10;
       	
       	/* Open the INTC Module for Vector ID: 4 and Event ID: 17 (C6678 DSP)
       	 * 	Refer to the interrupt architecture and mapping document for the Event ID
       	 * 	PCIEXpress_MSI_INTn (Message Signaled Interrupt Mode) */
       	vectIdMsi = CSL_INTC_VECTID_4;
       	hTestMsi = CSL_intcOpen (&intcObjMsi, 17, &vectIdMsi, NULL);
       	if (hTestMsi == NULL)
       	{
       		printf("Error: GEM-INTC Open failed for MSI event\n");
       		return;
       	}
    
       	/* Register an call-back handler which is invoked when the event occurs. */
       	EventRecord.handler = &msi_irq_handler;
       	//EventRecord.arg = (void *)hTestMsi;
       	EventRecord.arg = 0;
    
       	if (CSL_intcPlugEventHandler(hTestMsi, &EventRecord) != CSL_SOK)
       	{
       		printf("Error: GEM-INTC Plug  MSI event handler failed\n");
       		return;
       	}
    
       	/* Enabling the events. */
       	if (CSL_intcHwControl(hTestMsi, CSL_INTC_CMD_EVTENABLE, NULL) != CSL_SOK)
       	{
       		printf("Error: GEM-INTC CSL_INTC_CMD_EVTENABLE command failed for MSI event\n");
       		return;
       	}
    
       	printf("Debug: GEM-INTC Configuration Completed \n");
    }

    Thanks,