Other Parts Discussed in Thread: TMS320C6678
Dear proffessor,
Recently,I am doing a job that combining the srio、hyperlink and pcie project together. I meet a problem that is the RC can not receive the interrupt coming from the EP ,but the buffer has the right data. The RC stops at the address which belongs to the csl_vect section, this section is generated only by the hyperlink. So,I doute if the hyperlink interrupt has a impact on the pcie.What is more, the pcie project is based on the sys/bios.I need you help.Thans very much! The picture blow shows the RC stop address.


