Greetings TI-Community,
I try to setup a block transfer DMA between two blocks of data located in DDR3 and until now I failed.
I studied the example in:
C:\ti\pdk_C6678_1_1_2_6\packages\ti\csl\example\edma\edma_test.c
and this usefull thread at:
http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/177116.aspx#637557
Now the DMA initialization succeds and after starting the DMA request the data is not transfered and the completion is never reached.
My programm globals:
//DMA
Uint8 channelNum = 0;
Int32 regionNum = 0;
Uint8 instNum = 0;
Uint8 PaRAM_number = 0;
Int32 ACNT = 256; //MTU = 378 -> shrd_data = 10*378 -> /256 = 14 BCNT=14
Uint8 BCNT = 14;
Uint8 CCNT = 1;
CSL_Edma3Handle hModule;
CSL_Edma3Obj edmaObj;
CSL_Edma3ParamHandle hParam;
CSL_Edma3ChannelObj chObj;
CSL_Edma3CmdIntr regionIntr;
CSL_Edma3ChannelHandle hChannel;
CSL_Edma3ParamSetup ParamSetup;
CSL_Edma3Context context;
CSL_Edma3ChannelAttr chAttr;
CSL_Status status;
My EDMA_Setup function:
int* Setup_EDMA(){
int eb0=0, eb1=0;
//Initialization
if (CSL_edma3Init(&context) != CSL_SOK){
//printf ("Error: EDMA module initialization failed\n");
eb0=1;
goto error;
}
hModule = CSL_edma3Open(&edmaObj, instNum, NULL, &status);
if ( (hModule == NULL) || (status != CSL_SOK)){
//printf ("Error: EDMA module open failed\n");
eb0=2;
goto error;
}
chAttr.regionNum = CSL_EDMA3_REGION_GLOBAL;
chAttr.chaNum = channelNum;
hChannel = CSL_edma3ChannelOpen(&chObj, instNum, &chAttr, &status);
if ((hChannel == NULL) || (status != CSL_SOK)){
//printf ("Error: Unable to open EDMA Channel:%d\n", channelNum);
eb0=3;
goto error;
}
/*
if(!instNum)
{
// For first EDMA instance there are only 2 TCs and 2 event queues
// Modify the channel default queue setup from 0 to 1
//
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_1) != CSL_SOK)
{
//printf ("Error: EDMA channel setup queue failed\n");
eb0=4;
goto error;
}
}
else
{
// For EDMA instance 1 and 2 maximum of 4 TCs and 4 event queues are supported
// Change Channel Default queue setup from 0 to 3
//
if (CSL_edma3HwChannelSetupQue(hChannel,CSL_EDMA3_QUE_3) != CSL_SOK)
{
//printf ("Error: EDMA channel setup queue failed\n");
eb0=5;
goto error;
}
}
*/
/* Map the DMA Channel to PARAM Block PaRAM_number. */
//CSL_edma3MapDMAChannelToParamBlock (hModule, channelNum, PaRAM_number);
CSL_edma3HwChannelSetupParam(hChannel, PaRAM_number);
/* Obtain a handle to parameter set PaRAM_number */
hParam = CSL_edma3GetParamHandle(hChannel, PaRAM_number, &status);
if (hParam == NULL)
{
//printf ("Error: EDMA Get Parameter Entry failed for %d.\n",PaRAM_number);
eb0=6;
goto error;
}
//Parameter
//OPT Channel Options Parameter
//BLOCK MOVE OPT=0x00 0x10 0x00 0x08=b00000000 b00010000 b00000000 b00001000
ParamSetup.option = CSL_EDMA3_OPT_MAKE (CSL_EDMA3_ITCCH_DIS, // not intermediate chaining
CSL_EDMA3_TCCH_DIS, // not complete chaning
CSL_EDMA3_ITCINT_DIS, //not intermediate int
CSL_EDMA3_TCINT_EN, //complete int
0, //reserved
CSL_EDMA3_TCC_NORMAL, //transfer complete code
CSL_EDMA3_FIFOWIDTH_NONE, //8bit
CSL_EDMA3_STATIC_EN, //PaRAM static
CSL_EDMA3_SYNC_A, //A-MODE
CSL_EDMA3_ADDRMODE_INCR,
CSL_EDMA3_ADDRMODE_INCR );
ParamSetup.srcAddr = (Uint32)&rptrUDPrecvRING;//(Uint32)&rptrUDPrecvRING; //source address
ParamSetup.aCntbCnt = CSL_EDMA3_CNT_MAKE(ACNT,BCNT); //sprugs5a 2-9
ParamSetup.dstAddr = (Uint32)&wptrSHRDdata;//(Uint32)&wptrSHRDdata; //destination address
ParamSetup.srcDstBidx = CSL_EDMA3_BIDX_MAKE(0,0);
ParamSetup.linkBcntrld= CSL_EDMA3_LINKBCNTRLD_MAKE(0xFFFF, 0); //0xFFFFH = NULL link
ParamSetup.srcDstCidx = CSL_EDMA3_CIDX_MAKE(0,0); //offset between frames (2rd) in one block (3rd)
ParamSetup.cCnt = CCNT; //3rd cnt
if (CSL_edma3ParamSetup(hParam,&ParamSetup) != CSL_SOK){
//printf ("Error: EDMA Parameter Entry Setup failed\n");
eb0=7;
goto error;
}
if(CSL_edma3HwChannelControl(hChannel, CSL_EDMA3_CMD_CHANNEL_ENABLE, NULL) != CSL_SOK){
eb0=8;
goto error;
}
//Interrupt
/* Interrupt enable (Bits 0-1) for the global region interrupts */
regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
regionIntr.intr = 0x1; // EVENT 36 -> global INT on EDMACC0: EDMA3CC0 CC_GINT (tms320c6678.pdf; 171)
regionIntr.intrh = 0x0000;
if(CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTR_ENABLE,®ionIntr) != CSL_SOK){
eb0=9;
goto error;
}
printf("\nEDMA channel successfully initialized!");
return NULL;
/*
//Poll on IPR bit 0
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
//Clear the pending bit
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
START
CSL_edma3HwChannelControl(hModule, CSL_EDMA3_CMD_CHANNEL_SET, NULL);
*/
error:
/* Close channel */
if (CSL_edma3ChannelClose(hChannel) != CSL_SOK){
printf("Error: EDMA Channel Close failed\n");
eb1=10; //dirty exit
printf("\nSetup_EDMA failed with error code: %d\n",eb0+eb1);
return (int*)eb0+eb1;
}
/* Close EDMA module */
if (CSL_edma3Close(hModule) != CSL_SOK){
printf("Error: EDMA Module Close failed\n");
eb1=20; //dirty exit
printf("\nSetup_EDMA failed with error code: %d\n",eb0+eb1);
return (int*)eb0+eb1;
}
printf("\nSetup_EDMA failed with error code: %d\n",eb0+eb1);
return (int*)eb0+eb1;
}
My paramset_opt register shows 0x80100008 what should be a simple block transfer setup. The source and destination registers show the address of the correct pointers for my configuration.
My main() function calls the setup function and tries to start the DMA transfer. The transfer never starts and the programm dies in the polling loop for the completion register.
The mentioned memory regions stay untouched in memory browser window. Here the EDMA part of my main():
Setup_EDMA();
//CSL_intcGlobalEnable(NULL);
//CSL_chipWriteReg(CSL_CHIP_ITSR,1);
//CSL_chipWriteReg(CSL_CHIP_CSR,1);
#ifdef debug_mode_on
#define REGISTER_ESR (0x002701010)
#endif
for(;;){
if(CSL_edma3HwChannelControl(hChannel, CSL_EDMA3_CMD_CHANNEL_SET, NULL)!=CSL_SOK){
for(;;);
}
#ifdef debug_mode_on
if(*((int*)REGISTER_ESR)!=0){
for(;;){
printf("\ndma1");
}
}
//#define REGISTER_ESR (0x002701010)
*((int*)REGISTER_ESR) = 3;
if(*((int*)REGISTER_ESR)==3){
for(;;){
printf("\ndma2");
}
}
#endif
//CSL_TpccRegs.TPCC_ESR |= (CSL_TPCC_TPCC_ESR_E0_MASK | CSL_TPCC_TPCC_ESR_E1_MASK);
//CSL_chipWriteReg(REGISTER_ESR,3);
//regionIntr.region = CSL_EDMA3_REGION_GLOBAL;
//regionIntr.intr = 0;
//regionIntr.intrh = 0;
//WAIT until DMA complete
do {
CSL_edma3GetHwStatus(hModule,CSL_EDMA3_QUERY_INTRPEND,®ionIntr);
} while (!(regionIntr.intr & 0x1));
//Clear the pending bit
CSL_edma3HwControl(hModule,CSL_EDMA3_CMD_INTRPEND_CLEAR,®ionIntr);
}
Thank for your time.
Patrick
