dsp0 running from master arm0 via IPCGR reg - tci66382k2

Hi,

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1. Are you working on custom board or EVM?

2. Where the above code snippet is integrated? Is the ARM boot loader supplied by TI?

3. How & Where(memory location) have you downloaded the dsp application file to memory (.out) ?

4. What is the boot mode used?

5. What is the address written in "Boot Magic address" for dsp core0? Refer the section 8.1.1 in data manual.

Data Manual: http://www.ti.com/lit/ds/symlink/tci6638k2k.pdf

Also refer the boot loader user guide for more information:

ARM: http://www.ti.com/lit/spruhj3

DSP: http://www.ti.com/lit/sprugy5

The  TCI6634K2K & TCI6638K2K devices are not supported in e2e forums.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/351616.aspx

Hi 

Thanks for yor reply

 - Are you working on custom board or EVM? 

EVM.

-Where the above code snippet is integrated? Is the ARM boot loader supplied by TI?

In a initialization task and yes 

-How & Where(memory location) have you downloaded the dsp application file to memory (.out) ?

I use emulator. & DSP's internal memory

What is the address written in "Boot Magic address" for dsp core0?

Actually I think problem is here which adress should be written for wake up dsp0 thaks to arm0 ?

In last version I use arm0's magic adress because when I use dsp's(it means x = 0), I encounter severe error about ram acces. Instead of this I use 0xc5ad000(arm0's magic adress)

/*

#define MAGIC_ADDR 0x8FFFC

#define BOOT_MAGIC_ADDR(x) (MAGIC_ADDR + (1<<28) + (x<<24)) 

*/

 

void run_dsp0()
{
int i,j;
DEVICE_REG32_W(KICK0, 0x83e70b13);
DEVICE_REG32_W(KICK1, 0x95a4f1e0);
DEVICE_REG32_W(0xc5ad000, 0x868624);
for (i=0; i<1000; i++){}

DEVICE_REG32_W(IPCGR(0) , 1);//dsp0's IPCGR
for (j=0; i<1000; j++){}


}

 

Hi

I have a problem that start to run dsp0 from its entry point thanks to IPC interrupt. I use magic address, KICK regs and IPC regs. My codes is below. My master core is arm0 and that register is written by arm0 core.

When that codes run, I expect that dsp0 write own start pattern in mcpm area. It is my way whether dsp0 is in running state.

But when I check mcpm area from arm0, I cant see any differences in that area. 

I think maybe I cant write anything KICK regs or boot magic addres. Because when I control that regs from memory map, nothing is written. Lastly I modified .cfg files and mmu settings  because I think maybe I should give permission to arm0. However It is still no change.

#define DEVICE_REG32_W(x,y) *(volatile uint32_t *)(x)=(y)
#define DEVICE_REG32_R(x) (*(volatile uint32_t *)(x))

#define CHIP_LEVEL_REG 0x02620000
#define KICK0 (CHIP_LEVEL_REG + 0x0038)
#define KICK1 (CHIP_LEVEL_REG + 0x003C)

#define MAGIC_ADDR 0x8FFFFC

#define BOOT_MAGIC_ADDR(x) (MAGIC_ADDR + (1<<28) + (x<<24))
#define IPCGR(x) (0x02620240 + x*4)

#define BOOT_MAGIC_NUMBER 0xBABEFACE
#define BOOT_MAGIC_ADDR(x) (MAGIC_ADDR + (1<<28) + (x<<24))





BootMagicAddress = BOOT_MAGIC_ADDR(BootMagicCore);
IPCRegAddress = IPCGR(IPCRegCore);

DEVICE_REG32_W(KICK0, 0x83e70b13);
DEVICE_REG32_W(KICK1, 0x95a4f1e0);
DEVICE_REG32_W(BootMagicAddress, EntryPointAddress); //Written entry point of dsp0 to magic address
for (i=0; i<1000; i++){}

DEVICE_REG32_W(IPCRegAddress, IPCRegValue);
for (j=0; i<1000; j++){}

Please help 

Thanks

Olcay