Does 66AK2H12/06 PCIe (ARM Master) boot support endpoint?

RY9983

Other Parts Discussed in Thread: 66AK2H12

Hello,
I am developping 66AK2H12/06 system.
a) I would like to boot ARM from PCIe endpoint.
Is that suppported?

b) If yes,
   How can I configure PCIESSMODE[1:0] and PCIESSEN in 66AK2H12/06?
     - GPIO[15:14] is multiplexed as PCIESSMODE[1:0]. Right?
     - How can I configure PCIESSEN? (I can not find it in the datasheet.)

Background:

I have refered datasheet and some application notes.
My understanding is:
- PCIe (ARM Master) boot is supported in 66AK2H12/06.
- GPIO[15:14] controls PCIESSMODE[1:0].
- PCIESSEN is latched at power up.

But,
- GPIO[15:14] is assigned to other function pin in datasheet.
- There is no PCIESSEN pin in datasheet.

Best regards, RY

over 11 years ago

0 Raja over 11 years ago

TI__Guru* 81335 points

Hi RY,

Yes. The ARM PCIe boot support is available in K2H.

The current MCSDK does not have ARM PCIe boot examples and may available in next release.

Regarding PCIE pin configuration, I have requested the experts to look into.

Thank you for your patience.

0 RY9983 over 11 years ago in reply to Raja

Guru 10570 points

Rajasekaran-san,

Thank you for your response.
I am waiting advise from experts.

Best regards, RY

0 RY9983 over 11 years ago in reply to RY9983

Guru 10570 points

Rajasekaran-san,

Thank you so much for your support.
Could you let me know the time you are needed?
I will ask the customer to wait a few days.

Best regards, RY

0 Bill Taboada over 11 years ago

TI__Mastermind 42545 points

Hi RY,

The PCIESSMODE bootmode pins and the PCIESSEN pin have been removed from the KeyStone II devices. The KeyStone II Hardware Design guide incorrectly refers to these pins. The PCIE Users Guide supports both KeyStone I and KeyStone II devices but it needs to clarify the differences. I'll send a note to the engineer that supports that document. The PCIE mode is set by writing the correct value to the PCIESSMODE bits in the DEVSTAT register in KeyStone II devices.

Regards, Bill

0 RY9983 over 11 years ago in reply to Bill Taboada

Guru 10570 points

Bill-san,
Thank you so much for your support!
I could feel it.

Anyway, during PCIe ARM Master boot, does the 66AK2H12/06 boot with Endpoint mode? (PCIESS[1:0]=00b)

or Legacy Endpoint? (PCIESS[1:0]=01b)
or Root Complex? (PCIESS[1:0]=10b)

Best regards, RY

0 Ganapathi Dhandapani95 over 11 years ago in reply to RY9983

TI__Mastermind 28085 points

Hi RY,

If you want to configure PCIe as Endpoint mode, you need to write PCIESSMODE[1:0]=00b on DEVCFG register.

Refer section 8.2.3.2 Device Configuration Register on data manual.

Thanks,

0 RY9983 over 11 years ago in reply to Ganapathi Dhandapani95

Guru 10570 points

Ganapathi-san,
Of course, I have understood the DEVCFG can configure Endpoint mode.
But, it can not be configured during ARM PCIe boot.
(It is configured by latching of PCIESSMODE[1:0] and PCIESSEN at power up in Keystone I.)

Since PCIESSMODE[1:0] and PCIESSEN do not exist in K2H, please let me know the mode(Endpoint, Legacy Endpoint, Root Complex) during ARM PCIe boot.

Best regards, RY

0 Thanh H Tran over 11 years ago in reply to RY9983

TI__Intellectual 760 points

Hi RY,

The ROM of K2H in PCIe ARM master boot mode boots with either EP or Legacy EP mode.

Best regards,

Thanh

0 Bill Taboada over 11 years ago in reply to Thanh H Tran

TI__Mastermind 42545 points

Hi RY,

Since the K2H does not include PCIESSMODE configuration pins, the PCIESSMODE bits in the DEVCFG register will default to 00 or EP mode. Legacy EP mode is not supported by PCIE boot in the RBL.

Regards, Bill

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Does 66AK2H12/06 PCIe (ARM Master) boot support endpoint?