Sharing external DDR3 memory over SRIO

Yoonsun Kim

Expert 1870 points

Hello,

There will be three c6671 on the board.

Each c6671 has DDR3 memory and is connected to FPGA over 2 SRIO lanes.

One c6671 will act as master and the others will act as slaves. Master will connect to each slave by 1 SRIO lane.

Actually I planed to share memories over PCIe, but in this case I need PCIe switch. I need to reduce component.

My question is whether I can share external memory over SRIO?

If possible, where is related information?

over 11 years ago

0 Ganapathi Dhandapani95 over 11 years ago

TI__Mastermind 28085 points

Hi Yoonsun,

It is possible, C6671 SRIO have 4 1x lane only.

Please take a look at section 2.10 SRIO interface on attached document.4118.DSPC-8681E HW User Manyal_V0.3_20120621.pdf

Thanks,

0 Yoonsun Kim over 11 years ago in reply to Ganapathi Dhandapani95

Expert 1870 points

Hello Ganapathi.

When two c6671s are connected to each other over SRIO, how do they share DDR3 data.

Are there libraries or internal hardware for sharing external memory over SRIO?

Or do I need to develop protocol and software code to share memory data?

0 Ganapathi Dhandapani95 over 11 years ago in reply to Yoonsun Kim

TI__Mastermind 28085 points

Hi Yoonsun,

Please take a look at SRIO user guide.

SRIO driver to send the data to another DSP. SRIO example projects are available in MCSDK package(\ti\pdk_C6678_1_1_2_6\packages\ti\drv\exampleProjects).

Thanks,

0 Sung-IL over 11 years ago in reply to Ganapathi Dhandapani95

TI__Mastermind 31490 points

Hi Yoonsun,

Please take a look at this E2E, which should answer your question for DDR3 memory issue.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/222479/783341.aspx#783341

Thanks and Best Regards,

SI.

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Sharing external DDR3 memory over SRIO