Error about main pll with TMDSEVM6657LS

hi:

I have a TMDSEVM6657LS ,bought from TI.

Now it does not work in the right way.Please Help me to check the errors.

i used the XDS200 Emulator to run the program ,it's ok.

And one time , I try to test the EMIF with a ADC .at the very beginning,it does work,but then ,there was something wrong with it.

when I try to Debug,It's the log in the console window:

[C66xx_0] Initialize DSP main clock = 100.00MHz/1x10 = 1000MHz

C66xx_0: Power Failure on Target CPU 
C66xx_0: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging
C66xx_1: No Clock Signal On Target CPU 
C66xx_1: Failed to remove the debug state from the target before disconnecting. There may still be breakpoint op-codes embedded in program memory. It is recommended that you reset the emulator before you connect and reload your program before you continue debugging

And then i  lanuched a config file "xx.ccxml",

connect core0 ，

load GEL ,“evmc6657l.gel”,

Global_Default_Setup

It's the log in the console window:

C66xx_0: GEL Output: Setup_Memory_Map...
C66xx_0: GEL Output: Setup_Memory_Map... Done.
C66xx_0: GEL Output: C6657L GEL file Ver is 1.002 
C66xx_0: GEL Output: Global Default Setup...
C66xx_0: GEL Output: Setup Cache... 
C66xx_0: GEL Output: L1P = 32K 
C66xx_0: GEL Output: L1D = 32K 
C66xx_0: GEL Output: L2 = ALL SRAM 
C66xx_0: GEL Output: Setup Cache... Done.
C66xx_0: GEL Output: Main PLL (PLL1) Setup ... 
C66xx_0: GEL Output: PLL in Bypass ... 
C66xx_0: GEL Output: PLL1 Setup for DSP @ 1000.0 MHz.
C66xx_0: GEL Output: SYSCLK2 = 333.3333 MHz, SYSCLK5 = 200.0 MHz.
C66xx_0: GEL Output: SYSCLK8 = 15.625 MHz.
C66xx_0: GEL Output: PLL1 Setup... Done.
C66xx_0: GEL Output: DSP core #64 cannot set PSC.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ... 
C66xx_0: GEL Output: DSP core #64 cannot set DDR3 PLL
C66xx_0: GEL Output: DDR3 Init begin (1333 auto)
C66xx_0: GEL Output: XMC Setup ... Done 
C66xx_0: GEL Output: 
DDR3 initialization is complete.
C66xx_0: GEL Output: DDR3 Init done
C66xx_0: GEL Output: DDR3 memory test... Started
C66xx_0: GEL Output: DDR3 memory test... Failed
C66xx_0: GEL Output: Main PLL (PLL1) Setup ... 
C66xx_0: GEL Output: DSP core #64 cannot set PLL1.
C66xx_0: GEL Output: Error in Setting up main PLL, please power cycle the board and re-run Global Default Setup...

so I don't know what's wrong with it.

My code works ok before connecting the ADC.

Is the DSP chip broken？How can I test it?

Thanks!!!!!