What should be the value set in "GPMC_CONFIG7_0 Register (offset = 78h)" for 256 MB NOR flash connected to CS0? (Processor - AM3352)
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What should be the value set in "GPMC_CONFIG7_0 Register (offset = 78h)" for 256 MB NOR flash connected to CS0? (Processor - AM3352)
Sankar, as I already noted in your other thread, our hardware engineer is on vacation. I'll try to contact the Level 2 support engineers, but they may also be out of office, so answers should be expected to be delayed.
Best regards,
Miroslav
Hello Sankar,
Please see section 7.1.6.17 of the TRM for setting the CS size. This is done with the MASKADDRESS field in the GPMC_CONFIG7 register. for 256MB you need to set that field to 8h.