dMAX Event Trigger Register (DETR) Question

Hi,

Please refer the link.

http://www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=spru795&fileType=pdf

Thank you for referring me to the dMAX Reference Guide... unfortunately there's nothing in there that addresses my initial question... I believe it's not documented anywhere, all the dMAX manual says is that this register is not memory mapped and that it's part of the CPU module, then it says refer to the device data sheet for specifics on where the DETR is.... it gives a little 'C' example of how to trigger an event via DETR, but I want to know CPU specifics, I would like to know the 5-bit address the CPU module uses to access the DETR via the MVC instruction... This is not documented anywhere within the current documentation set for the C67X/C67X+ family.

P.S.  I have read the data sheet for the C672X family and I have gone through the dMAX guide extensively as I have used them for other purposes, and I'm telling you nowhere in there does it answer my initial question.  

Hi,

Thanks for your post.

Please check the dMAX reference guide below, in which please refer section 2.3.14 for dMAX event trigger register and also, the DETR is not memory-mapped and it is placed inside CPU module which could avoid cpu overhead.

http://www.ti.com/lit/ug/spru795d/spru795d.pdf

Thanks & regards,
Sivaraj K

Hi Julxhino,

Thanks for your update and suggestions.

Sure we will add this info in out documentation.