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MCASP FIFO

Hi, we use DM8168 EVM, RDK4.0.

How can I access the MCASP0 register?

The base addr of MCASP0  register is 0x48038000?

Thanks.

  • Hi Li,

    Li Michelle said:
    How can I access the MCASP0 register?

    You need to enable the McASP0 clock from the device PRCM registers:

    CM_ALWON_MCASP0_CLKCTRL[1:0] MODULEMODE = 0x2 (enable)

    Li Michelle said:
    The base addr of MCASP0  register is 0x48038000?


    Yes, this is the base address of the McASP0 CFG/config port accessed from the Cortex-A8 ARM and L3/L4 interconnect. The McASP0 base address of the DAT/data/DMA port is 0x46000000. See the below wiki page for more info regarding the CFG and DAT port:

    http://processors.wiki.ti.com/index.php/McASP_Tips#Port_inconsistency

    Regards,
    Pavel