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How do you flush the DSP's cache?

_Ralph_
Guru 10685 points

I have an algorithm that runs using Codec Engine on the DM8168. The algorithm is running on the DSP while the host is an ARM.

The DSP algorithm takes a "Shared Region 2" buffer from the ARM (marked as uncacheable on the ARM) and then processes this buffer into an output buffer. The output buffer has been allocated with kmalloc on Linux then passed to the algorithm via the Codec Engine framework.

How do I ensure that after the DSP has processed the data into the output buffer it flushes its cache to the output buffer?

Thanks,
Ralph

  • 0
    TI__Expert 3265 points

    Hi Ralph,

    That's a good question. Ordinarily Codec Engine performs a cache-writeback of any data output buffer that the algorithm issued CPU writes to. This is performed bythe remote processor's VISA skeletons when cache is enabled for the Shared Region where the buffer resides. In the XDM 1.x VISA skeletons, it uses the .accessMask to determine whether this writeback needed.

    You may refer to following topic for reference:

    http://processors.wiki.ti.com/index.php/Cache_Management

    http://software-dl.ti.com/dsps/dsps_public_sw/sdo_sb/targetcontent/xdais/6_24/exports/xdais_6_24/docs/html/struct_x_d_m1___single_buf_desc.html#9795495a0ea10e9c5f9e321b2aa3e3e6

    Murat