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AM3354 schematic design

Other Parts Discussed in Thread: AM3354, TPS65910A

We are involved in designing a system with the AM3354 as processor. I have a few doubts regarding the schematic design provided by TI and the data sheets. It would be of great help if someone could clarify the following for me.

1.  The PMIC TPS65910A3 has its RTC output  given as VPMIC_VRTC. Why is there an LDO TPS71718 (U5) with a VRTC output then? Can't we use the VRTC_PMIC so that the PMIC is the single power on and power control chip ?

2. Even if an external LDO U5 is to be used, VRTC should be connected to U26C.D6 (CAP_VDD_RTC) and not U26C.D7(VDDS_RTC). Also it should be 1.1V and not 1.8V? 

Also, the first design that we made uses an earlier revision of the AM335X. We want to use silicon revision 2.0 or above for our next design onwards. The Schematics and PCB for this is not yet available. When will this be reaady?

Thanks..:)

  • Hi Athira,

    On your question about the additional external LDO, please check this document: http://www.ti.com/lit/ug/swcu093c/swcu093c.pdf

    On your second question: Rev.2.X silicon is 100% pin compatible with Rev.1.0. All silicon revision differences are listed in the AM335X Errata.

    Make sure you also check this wiki: http://processors.wiki.ti.com/index.php/AM335x_Schematic_Checklist  

  • Hi Biser,

    Thank you for the prompt reply. However I think I should clarify my question once again. I had gone through the links you shared earlier. The issues I face are this: 

    1.  According to the PMIC TPS65910A3 user guide (the same which you shared) , the RTC output  is given as VPMIC_VRTC. This is obtained from the VRTC pin.

    However, in the SCHEMATIC PCB pdf sheet provided by TI, there is an LDO TPS71718 (U5) with a VRTC output. I want to know why can't we use the VRTC_PMIC so that the PMIC is the single power on and power control chip ?

    2. Again, as per the datasheet and user guide, VRTC should be connected to U26C.D6 (CAP_VDD_RTC) and not U26C.D7(VDDS_RTC). 

    However, in the SCHEMATIC PCB pdf sheet provided by TI, VRTC is connected to U26C.D7(VDDS_RTC) and not U26C.D6 (CAP_VDD_RTC). Also, the voltage according to datasheet should be 1.1V and not 1.8V. 

    Please could you clarify why these differences between datasheet/user guide and the schematics are present?

    Thanks..:)

  • Athira Menon said:
    1.  According to the PMIC TPS65910A3 user guide (the same which you shared) , the RTC output  is given as VPMIC_VRTC. This is obtained from the VRTC pin. However, in the SCHEMATIC PCB pdf sheet provided by TI, there is an LDO TPS71718 (U5) with a VRTC output. I want to know why can't we use the VRTC_PMIC so that the PMIC is the single power on and power control chip ?

    If you take a look at Table 1 in the TPS65910A user guide you will see that TPS65910A and TPS65910A3 have the VRTC LDO in low power mode when the PMIC is in OFF mode. This provides only about 0.1mA which is insufficient to power the AM335X RTC section, especially on Rev. 1.0 silicon. Therefore an additional LDO is required if  TPS65910A or TPS65910A3 are used (see Figure 1).

    Athira Menon said:
    2. Again, as per the datasheet and user guide, VRTC should be connected to U26C.D6 (CAP_VDD_RTC) and not U26C.D7(VDDS_RTC). However, in the SCHEMATIC PCB pdf sheet provided by TI, VRTC is connected to U26C.D7(VDDS_RTC) and not U26C.D6 (CAP_VDD_RTC). Also, the voltage according to datasheet should be 1.1V and not 1.8V. Please could you clarify why these differences between datasheet/user guide and the schematics are present?

    There are two methods of providing power to the RTC section of AM335X:

    1. AM335X internal RTC LDO disabled: The CAP_VDD_RTC terminal operates as an input to the RTC core voltage domain when the internal RTC LDO is disabled by connecting the RTC_KALDO_ENn terminal to VDDS_RTC. If the internal RTC LDO is disabled, CAP_VDD_RTC should be sourced from an external 1.1V power supply (typically VDD_CORE).

    2. AM335X internal RTC LDO enabled: The CAP_VDD_RTC terminal needs to have connected a1uF bypass capacitor to GND when RTC LDO is enabled by connecting the RTC_KALDO_ENn terminal to GND. If the internal RTC LDO is enabled, VDDS_RTC is the power supply input for the RTC, sourced from an external 1.8V power supply (VRTC).

  • Thanks a lot Biser..Understood that perfectly...:)