OMAP 3503 Boundary scan implementation

Hi,

I am using OMAP3530 processor on a board design and is also trying to turn on the Boundary scan test mode using a boundary scan tool without any success.

I found this document on special configurations/commands to turn on the Boundary scan mode for OMAP35xx and I am using this but still unsuccessful.  I believe this can be use for OMAP3503 processor too.

 Please refer to the below
http://wiki.davincidsp.com/index.php/Boundary_Scan_on_OMAP35x

EMU0 and EMU1 needs to be pull up as stated in the document.  Two special ICEPICK commands need to be send to the processor.

Maybe you can give this a try and do let me know the result. 

If still not successful, let me know if you have found ways to get into the Boundary scan test mode.

THanks and regards,

Sean

We have tried generating boundary-scan interconnect tests on the OMAP 35x EVM and the Beagle board (http://beagleboard.org/) with limited success. Below are the issues we ran into and TI's response. Not a fix, but might give you more information on some of the issues. Our experience indicates the BSDL files have not been 100% tested against the silicon.

1) TI has two different BSDL files for different package devices. Each BDSL file matches in boundary-scan register length, but they have different pin names and cell definitions. While this is perfectly acceptable, it seems a little suspicious and I would assume the boundary-scan silicon is identical for each package. Usually if there are different implementations the lengths do not match.

<<Need to check this as low priority getting pushed out but really need to look at this.>>

2) We have executed the OMAP3430 BSDL/IEEE1149.1 access requirements which requires the execution of a pre-initialization SVF file which contains some specific commands before boundary scan testing can be done. The SVF file must be executed before the boundary-scan register is accessible (everything fails otherwise).

<<attached ppt & new CUS file updated for compliancy>>

3) I have interconnect tests running on the OMAP processor by itself. The test fails on many pins indicating that these pins are not reading themselves back correctly. The majority of pins work, however certain bits on larger buses are failing. For example CAM_D0 and CAM_D1 signals fail where CAM_D2 through CAM_D11 are passing.

<<These pins are input only BSDL is wrong as it says bidirectional pin which cause this issue. >>

4) I have setup several of the passing and failing signals in our Corelis debug software and the pins that failed during the interconnect test also do not respond during manual stimulus while checking with an external meter. The passing pins that I have checked are all responding as expected. This confirms boundary-scan failure results for #3, but does not identify the root cause of the failure.

Ryan Jones

Corelis, Inc -- Boundary-Scan Without Boundaries

http://www.corelis.com

HI,

I am trying to implement the boundary scan on the OMAP 3503 using the instructions in the OMAP 3530 ppt provided in one of the earler posts on the forum. The ppt talks about setting the system boot pins to a particular sequence i.e.

Now, in my system, i have connected the sys boot pins in a different sequence with nand as the first booting device (using pull up &  pull down resistors). So, does this mean i have to change the sys boot pattern in order to do boundary scan test? It does seem a little odd as either i have to change these resistors every time i have to do boundary scan or have to necessarily use the booting sequence that the above setting corresponds to.

Regards,

Akash

Akash,

I was told that SYS_BOOT value limitation mentioned above is applicable to DMLED tests and has nothing to do with boundary scan test.

Hi,

Wonder if anyone manage to get the OMAP3530 boundary scan test working?  I have a board with just the OMAP3530 on the Scan chain (have physically bypass the rest of the boundary scan devices) and the infrastructure test is not even working.  If I physically bypass the OMAP3530, infrstructure test is working okay for the rest of the devices, which means the JTAG signal to the Boundary scan tester is alright.

Can anyone please give me advice on how to get the boundary scan of OMAP3530 working properly? Thanks!

Sean

Sean,

We are looking into this one.  Could you list some details regarding what boundary scan tool (Corelis or ?) you are using and what specific commands you have initiated on OMAP35xx side to attempt to get into boundary scan mode.  As Ryan noted above, he was successful at least in running infrastucture test on OMAP processor and some interconnect tests after executing specific commands noted in OMAP34xx/35xx BSDL/IEEE 1149.1 access requirements.

I am using JTAG Technologies boundary scan tool.  I am trying to run the Infrastructure test with Capture-IR, etc which I think should not require any special commands prior to that.  Is that right or there need to be any special commands before Infrastructure test?  Currently, I am just trying to get the Infrastructure test running properly before executing other boundary scan instructions which require some specific commands noted in OMAP34xx/35xx BSDL/IEEE1149.1 access requirements.  Thanks!

James ,

Were can I find OMAP34xx/35xx BSDL/IEEE 1149.1 access requirements ?

Natan

Natan Shenkerman said:

Were can I find OMAP34xx/35xx BSDL/IEEE 1149.1 access requirements ?

The access sequence is given on the wiki at http://processors.wiki.ti.com/index.php/Boundary_Scan_on_OMAP35x.

I have not seen an answer to Sean's question about getting the OMAP3530 boundary scan test working.  I have an upcoming project that also has the OMAP3530 device in CBB package and it looks like I may be having the same issues in gettng the device into boundary scan mode.  If there are any tips or tricks please share your knowledge with this forum.  Thanks.

Hello Sean,

Did you manage to solve the OMAP3530 boundary scan test errors?  I encountered a similar problem. I also have a board with OMAP3530 and Xilinx FPGA on the same boundary scan chain (TDI->FPGA->OMAP ->TDO). I am using the JTAG Technologies boundary scan software. The infrastructure runs properly but boundary scan tests fail with this configuration. Most of the OMAP pins give “stuck at 1” errors. However, I checked the board and these pins don't stuck at 1. Maybe, they are not reading themselves back correctly. Can you share your knowledge with me? Best regards,

Hi Ergun, sorry for the late reply.  I was not able to solve my problem too with the OMAP3530.  I understand that there needs to be a special SVF ICEPICK file to be programmed into the OMAP processor before the BSCAN mode can be turn on.  This file has to be requested from Texas Instrument.  However, I still has issue even after programming the SVF file.  Maybe you can try this out on your board design and let me know if it works?  Best regards, Sean