Hi,
We are in the process of migrating from the 5510A to the 5505 for a lower power design, and we are keen to assess the power savings of the FFT HWA. Early on during the release of the 5505 we were informed that there would be an increased speed of x3.8 over the CPU for a 1024pt scaled FFT with an energy efficiency over the CPU of x6.0, however if you compare these figures with the datasheet for the 5505 it doesn't make sense. The data sheet quotes 22mW/MHz for a 75% DMAC+25% ADD, but 31 mW/MHz for the 1024pt FFT HWA, how is this x6.0 times more energy efficient even if it is running x3.8 faster? or were we originally mis-informed? Also, is it possible to idle the core while the FFT HWA is operational to save power, or perhaps parallel up some CPU operations instead? If anyone could shed any light on these matters we would be very grateful :-)
Thanks,
Ed
