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DM8168+C6678*2 to achieve a H.265 encode/decode user case.

SuitJune Young
Genius 3985 points

Hello,We want to use DM8168+C6678*2 to achieve a H.265 encode/decode user case.

                        PCIe                             X-bus?

DM8168<------------------->C6678<------------->C6678

And now we think the above diagram shows what we need.

We use DM8168 to push YUV data to C6678,and C6678 returns H.265 stream.Or DM8168 to push H.265 stream to C6678,then C6678 returns YUV data,and latter is a decode case.

Our target is to encode 720P30*2 H.265 LD streams+decode 720P30*2 H.265 LD streams simultaneously or

                            encode 1080P30*1 H.265 LD stream+decode 1080P30*1 H.265 LD stream simultaneously.

And it exceeds the capability of single C6678 device.So,how to connect two C6678.WIth X bus?Hyperlink or SRIO or SGMII?

And if we want to use two C6678 to encode/decode,do we need to use MultiCore Navigator to do something?such as order core0 to dispatch task,core 3 to encode a block of video?

  • 0
    TI__Mastermind 38820 points

    Hi Young,

    For multicore - multichip H.265 encoder and decoder, I suggest you to start taking a look to our MCSDK video framework

    http://processors.wiki.ti.com/index.php/MCSDK_VIDEO_2.x_Getting_Started_PCIe_Demo_Guide 

    In this MCSDK we have a PCIe HEVC encoder, decoder and transcoder demos which can be used as a starting point.

    Currently in our MCSDK we use PCIe as the  via of communication between chips.

    You can check this post for some information on how to connect DM8168 to C6678 via PCIe

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/335379.aspx

    Please let us know if you have any further question,

    thank you,

    Paula

  • 0 in reply to Paula Carrillo
    Genius 3985 points

    thanks.but the above link is for DM8168 connects to a SINGLE C6678 chip,however,our case is that use TWO C6678 chip.

    I mean could I connect the dm8168&c6678 like following?To encode one channel 1080P30 H.265 video?

                        pcie                                  hyperlink

    DM8168<----------->C6678<------------------------------->C6678

    You said that in MCSDK."we use pcie as the via connection between chips"

    You mean C6678 connects to another C6678 with pcie,or C6678 connects to a host,like PC via PCIe?

    thank you.

  • 0 in reply to SuitJune Young
    TI__Mastermind 38820 points

    Hi Young, host and C6678 chips can be connected via PCIe. In our current development of HEVC multichip/multicore, DSPs  communicate via PCie between them and with the host.

    Thanks,

    Paula

  • 0 in reply to Paula Carrillo
    Genius 3985 points

    DSPs communicate via PCIe between them and with host?

    I learned that PCIe is a P2P bus.So,one C6678 chip have a SINGLE PCIe port.Then there is at least one C6678 chip connects to the HOST and the next C6678 chip.However,there is only ONE PCIe port.How to do that?Disconnect/Connect to the host/C6678 according to the specific scenario?

  • 0 in reply to SuitJune Young
    TI__Mastermind 38820 points

    Hi Young

    you can use a PCIe bridge with Netra acting as root complex and c6678 chips as endpoints.

    thank you,

    Paula

  • 0 in reply to Paula Carrillo
    Genius 3985 points

    Thanks Paula.

    But I still have a question:

    if I use one DM8168 with TWO C6678.And the C6678s to do one 1080P30 h.265 encode,how do the TWO C6678s schedule the task?I mean,first c6678 do what?second c6678 do what?how to shedule?via what?Thus two c6678s both act as EP without communication mechanism,such as srio or hyperlink.

  • 0 in reply to SuitJune Young
    TI__Mastermind 38820 points

    Hi Young, apologize for my late response, I was out of office.

    In our HEVC encoder we divided the picture in virtual tiles. Each DSP work on a sub-picture, and inside each chip tasks are scheduled per core in a wavefront way. In other words, free cores check for pending task, which have resolved dependencies.

    Because it is a Virtual tile some information between chips is shared via inter-chip memory. However, you can also use mailbox or hyperlink as a via of inter chip communication.

    I would suggest, as a starting point, to take a look of our HEVC encoder, and transcoder demos included in our MCSDK video framework.

    thank you,

    Paula 

  • 0 in reply to Paula Carrillo
    Genius 3985 points

    Thanks for your reply.

    I will look into the corresponding doc.