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[AM335x] no omap_device for i2c1

Other Parts Discussed in Thread: AM3352

I'm having some I2C issues on a custom board with AM3352 chip.
I have the TPS65217C Power Management chip on I2C1 bus ( http://www.ti.com/product/tps65217c ) but looks like the bus is not working correctly.
As far as I understand the regulators are not enabled and pheripherals may not work correctly.
I don't need any sleep/standby/suspend functionality. I'm using kernel 3.12.20 from meta-ti layer, dora branch.
How do I fix this issue?


Full Device Tree Source: http://pastebin.com/YMDm5LDm 
Full boot log: http://pastebin.com/jQCNt4BT

This is the error I see while booting:
[ 2.065707] cpu cpu0: cpu0 regulator not ready, retry
[ 2.071132] platform cpufreq-cpu0.0: Driver cpufreq-cpu0 requests probe deferral
[ 2.079557] ------------[ cut here ]------------
[ 2.084598] WARNING: CPU: 0 PID: 1 at arch/arm/mach-omap2/omap_device.c:888 omap_device_get_by_hwmod_name+0x98/0xb8()
[ 2.095893] omap_device_get_by_hwmod_name: no omap_device for i2c1
[ 2.102453] Modules linked in:
[ 2.105761] CPU: 0 PID: 1 Comm: swapper Not tainted 3.12.20 #1
[ 2.111954] Backtrace:
[ 2.114628] [<c0017b64>] (dump_backtrace+0x0/0x10c) from [<c0017e48>] (show_stack+0x18/0x1c)
[ 2.123582] r6:c002fdb0 r5:00000009 r4:dd083e20 r3:00000000
[ 2.129701] [<c0017e30>] (show_stack+0x0/0x1c) from [<c0588b74>] (dump_stack+0x20/0x28)
[ 2.138267] [<c0588b54>] (dump_stack+0x0/0x28) from [<c00483fc>] (warn_slowpath_common+0x70/0x90)
[ 2.147760] [<c004838c>] (warn_slowpath_common+0x0/0x90) from [<c0048454>] (warn_slowpath_fmt+0x38/0x40)
[ 2.157852] r8:c078539c r7:c08713c0 r6:c08724c8 r5:c0cb18f0 r4:c06ce388
[ 2.165076] [<c004841c>] (warn_slowpath_fmt+0x0/0x40) from [<c002fdb0>] (omap_device_get_by_hwmod_name+0x98/0xb8)
[ 2.175990] r3:c0593dcc r2:c06ca974
[ 2.179856] [<c002fd18>] (omap_device_get_by_hwmod_name+0x0/0xb8) from [<c0792234>] (am33xx_pm_init+0x248/0x444)
[ 2.190680] r4:c08724c8
[ 2.193407] [<c0791fec>] (am33xx_pm_init+0x0/0x444) from [<c078ab60>] (am33xx_init_late+0x18/0x20)
[ 2.202939] r8:c078539c r7:c08713c0 r6:c08713c0 r5:00000007 r4:c07d8a30
[ 2.210172] [<c078ab48>] (am33xx_init_late+0x0/0x20) from [<c07853c0>] (init_machine_late+0x24/0x30)
[ 2.219923] [<c078539c>] (init_machine_late+0x0/0x30) from [<c0008a44>] (do_one_initcall+0x100/0x160)
[ 2.229764] [<c0008944>] (do_one_initcall+0x0/0x160) from [<c0782b98>] (kernel_init_freeable+0xf8/0x1b8)
[ 2.239892] [<c0782aa0>] (kernel_init_freeable+0x0/0x1b8) from [<c0583ab8>] (kernel_init+0x10/0x158)
[ 2.249655] [<c0583aa8>] (kernel_init+0x0/0x158) from [<c00143d8>] (ret_from_fork+0x14/0x3c)
[ 2.258640] r5:c0583aa8 r4:00000000
[ 2.262502] ---[ end trace 5a5cfa9d83b3ed6c ]---
[ 2.267443] Error fetching I2C sleep/wake sequence

My DTS configurations:
PINMUX

i2c1_pins: pinmux_i2c1_pins {
	pinctrl-single,pins = <
		0x158 0x2a	/* spi0_d1.i2c1_sda_mux3, INPUT | MODE2 */ 	/* I2C POWER MANAGEMENT */
		0x15c 0x2a	/* spi0_cs0.i2c1_scl_mux3, INPUT | MODE2 */ /* I2C POWER MANAGEMENT */
		/* 0x188 (PIN_INPUT_PULLUP | MUX_MODE0)    i2c0_sda.i2c0_sda */
		/* 0x18c (PIN_INPUT_PULLUP | MUX_MODE0)    i2c0_scl.i2c0_scl */
	>;
};

OCP

i2c1: i2c@4802a000 { 
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;
	status = "okay";
	clock-frequency = <400000>;

	/* Set OPP50 (0.95V) for VDD core */
	sleep-sequence = /bits/ 8 <
		0x02 0x24 0x0b 0x6d /* Password unlock 1 */
		0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
		0x02 0x24 0x0b 0x6d /* Password unlock 2 */
		0x02 0x24 0x10 0x02 /* Set DCDC3 to 0.95V */
		0x02 0x24 0x0b 0x6c /* Password unlock 1 */
		0x02 0x24 0x11 0x86 /* Apply DCDC changes */
		0x02 0x24 0x0b 0x6c /* Password unlock 2 */
		0x02 0x24 0x11 0x86 /* Apply DCDC changes */
	>;

	/* Set OPP100 (1.10V) for VDD core */
	wake-sequence = /bits/ 8 <
		0x02 0x24 0x0b 0x6d /* Password unlock 1 */
		0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
		0x02 0x24 0x0b 0x6d /* Password unlock 2 */
		0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
		0x02 0x24 0x0b 0x6c /* Password unlock 1 */
		0x02 0x24 0x11 0x86 /* Apply DCDC changes */
		0x02 0x24 0x0b 0x6c /* Password unlock 2 */
		0x02 0x24 0x11 0x86 /* Apply DCDC changes */
	>;

	tps: tps@24 {
		reg = <0x24>;
	};

};