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Another question about AIF2

Sun-Gu Lee
Prodigy 210 points

Hi

we design a customized CPRI frame structure using AIF2 between DSP(6670) and FPGA(Xilinx Zynq).

Our radio frame uses 5ms frame unit and I had a problem about how FPGA can distinguish first basic frame of 5ms in time axis.

So I thought of HFN(0~149)

the condition that HFN is zero or 75 can be utilized to find the first frame?

After a transition to HFSYNC state, that is, “Link up”, the first Hyper frame’s HFN is always zero, even though the link is reconnected.

Am I right?

 

assume that that DIO Egress start memory address is 0x0 and Ingress address is 0x1000 while RADT is set to 10ms.

In egress, a hyper frame with HFN=0 accommodates AxC datas of address 0x0 at first.

In ingress, when FPGA transmits a hyperframe with HFN=0, then the AxC data of the frame will be written from 0x1000 as DIO rules.

All is correct?

 

Regards

lee

  • 0
    TI__Expert 4740 points

    Hi,

    CPRI frame size is always 10 ms and AIF2 HW detect frame boundary when HFN == 0 and K28.5 is detected.  if you want 5ms frame size, your FPGA can differentiate each frame by checking HFN 0 and 75 like you described. when link is reconnected, AIF2 CPRI protocol engine always start the processing from HFN =0, so your assumption is right.

    DIO works 10 ms frame based and continuously transfers data within circular ram over and over again. your application may have to identify when and where is the 5ms Radio frame boundary starts. ingress and egress DIO memory is separated, so it works identically for both downlink and uplink.  

    Regards,

    Albert

  • 0 in reply to Albert Bae
    Prodigy 210 points

    your reply was a big help to me. thanks albert.