HI, TI Experters:
hardware:6670, software:ccs5.5
the hardware board is custom,take the spi boot mode to load program from nor flash, ddr3 size:2GB
core reference freq:96MHZ, DDR reference freq:96MHZ, so for this status, I rewrite the gel file.
1.when the no boot mode, after connect the core 0, load the custom gel file, the DDR can init and test pass, and load the custom led'program, which the text section load to DDR, the led' program can run successful.
2.while the spi boot mode, the same hardware, the same gel file ,the same step, while load the gel file, the DDR init and test failure.
why could be that on the spi boot mode? Thank you!!!
Best Regards
atower