C6657 PCIe debug

g.f.

Hi,

I have a question about C6657 PCIe.

In our system, C6657 is Endpoint of PCIe and ARM processor(not TI) is Root Complex.
Linux are running on ARM processor but Linux don't detect C6657 PCIe.

I want to know what is the first step to debug.

May be link training have been failed, so that I'm going to check
LTSSM_STATE field in DEBUG0 register of C6657(endpoint) if it is set to 0x11 or not. Is this the right step to do?

best regards,
g.f.

over 11 years ago

0 Ganapathi Dhandapani95 over 11 years ago

TI__Mastermind 28085 points

Hi,

Yes, Please take a look at below thread it should be helpful for you.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/363650/1281111.aspx#1281111

Thanks,

0 g.f. over 10 years ago in reply to Ganapathi Dhandapani95

Guru 15520 points

Hi Ganapathi,

Thank you for the reply and I'm sorry for the delay.

I checked the value of LTSSM_STATE and it was 0x11.

I also try the method which was discuss in the post you shared.
I tried the following part:
////////////////////////////////////////////////////////////////////
What you can do is to re-enable LTSSM_EN once:
The code is mcsdk_2_01_02_06\tools\boot_loader\ibl\src\device\c66x\c66xinit.C, search for iblPCIeWorkaround()

DEVICE_REG32_W ((PCIE_BASE_ADDR + PCIE_APP_CMD_STATUS), 0x0000007); /* enable LTSSM, IN, OB */
while((DEVICE_REG32_R(PCIE_BASE_ADDR + PCIE_DEBUG0) & 0x11)!=0x11); /* Wait for training to complete */

After here, wait for some time, maybe hundreds of ms.
Check the LTSSM in DEBUG0 register again for bits 0-4, if it is not 0x11,
then re-enable the link training by writing 1 to LTSSM_EN, this should work.
////////////////////////////////////////////////////////////////////

After waiting hundred of ms, LTSSM is 0x11 but still Linux don't detect C6657 PCI endpoint.

Is there any other debug to do?

By the way, it seem that this problem occure when Root Complex send Hot Reset to endpoint.
If we stop sending Hot Reset, Linux will detect C6657 endpoint.

best regards,
g.f.

0 Ganapathi Dhandapani95 over 10 years ago in reply to g.f.

TI__Mastermind 28085 points

Hi,

Is the link training of DSP's PCIE is enabled after the PC's hot reset?

Please refer below thread and check the power sequence on your setup.

http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/363650/1280596.aspx#1280596

Thanks,

0 g.f. over 10 years ago in reply to Ganapathi Dhandapani95

Guru 15520 points

Hi Ganapathi,

Thank you for the reply.

Are you saying about LTSSM_EN bit?
Yes, LTSSM_EN bit was enabled.

best regards,
g.f.

0 Ganapathi Dhandapani95 over 10 years ago in reply to g.f.

TI__Mastermind 28085 points

Yes, you enabled the link training of DSP's PCIE after the PC's hot reset or before host reset.

The below IBL code executing after the Hot reset or before on your setup.

DEVICE_REG32_W ((PCIE_BASE_ADDR + PCIE_APP_CMD_STATUS), 0x0000007); /* enable LTSSM, IN, OB */
while((DEVICE_REG32_R(PCIE_BASE_ADDR + PCIE_DEBUG0) & 0x11)!=0x11); /* Wait for training to complete */

Thanks,

0 g.f. over 10 years ago in reply to Ganapathi Dhandapani95

Guru 15520 points

Hi,

Sorry, Ganapathi.
I wiil close this thread.

best regards,
g.f.

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C6657 PCIe debug