I am setting up a simple SPI transmit via EDMA on the DM648 processor. I have already been able to successfully transmit over SPI using the DSP to load the SPIDAT1 register, but when substituting the EDMA engine as the source of the transfer, I am getting errors in the EDMA3 Transfer Controller. The EDMA Transfer Controller identifies them as write errors to the TCC 46 -- so these are write errors to the SPIDAT1 register. I have double checked all the PaRAM values, and they all look good, including the DST address of 0x204783C, which corresponds to SPIDAT1. The transfer is setup as A synchronized, with A = 2 (2 bytes written per SPI transmit event), B = 80 (the number of 2-byte fields to be transferred) and C = 1. The DST BIDX is set to 0, as we are programming a register in the SPI peripheral. Both SAM and DAM are set for incrementation (since the destination address is not aligned to 256 bytes), but the destination will increment by 0. The source address increments by 2 bytes per event. The SPI XEVT is happening since we see an initial transfer begin by the EDMA engine. The PaRAM looks correct in its update on the move of the first 2 bytes in the frame. But the EDMA3 stops due to the transfer controller flagging a write error to the destination address.
The questions I have are:
1) have others successfully used the EDMA3 on the DM648 to transmit out the SPI port (note there is no receive in my system)? and
2) any pointers on how to further debug this situation?
We have been using the EDMA3 quite successfully for other peripherals in the DM648, and we can make the SPI work by having the CPU write 16-bit chunks to the SPIDAT1. (As a point of interest, we used this same SPI and EDMA code to run DMAs on the Jacinto processor -- and the DM648 SPI looks like a stripped down version of that on the DM648).
Any help would be greatly appreciated.
Thanks.
