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TI silicon: configuration & static inputs - tie hard high?

Bernhard Boehmer
Expert 1120 points
Other Parts Discussed in Thread: TMS320C6748

In a space-constrained design, is it allowable (from the point of view of TI silicon) to tie inputs which are required to be static high (e.g. dedicated Boot pins, unused NMI, etc) directly to the appropriate supply rail (i.e. without using a pull-up resistor)?

I realise that the use of resistors has advantages i.t.o. being able to mod the board if required, but assuming that the design is settled, pin allocation is fixed and software can be 'guaranteed' not to accidentally set these pins to "output low", is it allowable to tie inputs hard high (just as it is to tie static low input pins directly to GND)?

The industry in general seems to differentiate between TTL inputs (where the use of pull-ups in these situations is generally advised) and CMOS inputs (where inputs tied hard high seem to be allowable). It would be great to have an authoritative generic reply for all TI parts on this, but in case this needs to be more specific, the part in question today is a TMS320C6748 DSP which has (dual-voltage capable) LVCMOS inputs.

  • 0
    TI__Mastermind 43660 points

    Hello Bernhard,

    Though the device has LVCMOS inputs, TI strongly recommends to use pull-up resistors for boot & configuration pins and other input pins. 

    You can find the detailed explanation on using pull-up/pull-down resistor in the device datasheet (section 4.3).

    http://www.ti.com/lit/ds/symlink/tms320c6748.pdf

    Regards,
    Senthil

  • 0 in reply to Senthilkumar Srinivasan
    Expert 1120 points

    Hello Senthil,

    Thank you for your reply. Reading section 4.3 of the device datasheet in context, the strong recommendation is for the case when the boot and configuration pins "are both routed out and 3-stated". The point is that one should not rely on the DSP's internal pull resistors alone.

    However, the question was a different one: Is it allowable to tie pins used only as inputs and which are required to always read "high" directly to the appropriate DSP supply rail?

    Bernhard

  • 0 in reply to Bernhard Boehmer
    Expert 1120 points

    Perhaps the question could be restated more succinctly as follows:

    If any DSP input pins are directly tied to the appropriate DSP supply rail, what adverse effects could occur (e.g. silicon latch-up), if any?

    Assumptions:

    1. Board "moddability" is not required at all (the design as such production-ready).

    2. Pin allocation is fixed and does not need to change.

    3. Software will never set these pins to "output low".

  • 0 in reply to Bernhard Boehmer
    TI__Mastermind 43660 points

    Hello Bernhard,

    If you only want to supply a defined high logic level to a definitely input pin, a direct connection to supply rail would be fine in my opinion.

    Make sure that all the assumptions listed above must be taken care.

     

    Regards,

    Senthil

     

  • 0 in reply to Senthilkumar Srinivasan
    Expert 1120 points

    Thank you Senthil. Does TI perhaps have a Design Note on this issue?

  • 0 in reply to Bernhard Boehmer
    TI__Mastermind 43660 points

    Hello Bernhard,

    I think TI doesn't have a design note for this.

    Regards,

    Senthil

  • 0 in reply to Senthilkumar Srinivasan
    TI__Mastermind 46460 points

    Bernhard,

    An input-only LVCMOS pin can be tied directly to the supply rail OR ground without harming the device.  However, your succinct list raises an important point.  Many multiplexed pins may have output modes.  Even though this may not be the desired use case for your board, these pins may be outputs during device start-up.  Therefore, this is not an allowed solution for any pin that has an output mode.  Resistor pulls must be used for these.  Otherwise, device reliability may be impacted.

    Tom

     

  • 0 in reply to Tom Johnson 16214
    Expert 1120 points

    Hello Tom,

    Thank you for the extra information. Section 6.4.1 (and section 6.4.2) of the TMS320C6748 datasheet states:

    All pins are tri-stated with the exception of RESETOUT which remains active
    through the reset sequence, and RTCK/GP8[0]. During reset, GP8[0] is configured as a reserved function,
    and its behavior is not deterministic; the user should be aware that this pin will drive a level, and fact may
    toggle, during reset. RESETOUT in an output for use by other controllers in the system that indicates the
    device is currently in reset.

    After reset, the pins in question (Boot pins) are configured as input pins by default.

    Thus the DSP should never drive these (Boot) pins during reset and device start-up. Do you concur?

    Bernhard

  • 0 in reply to Bernhard Boehmer
    TI__Mastermind 46460 points

    Bernhard,

    I do not accept that distinction.  I stand by my previous statement.  If a pin can ever be configured as an output, I do not recommend connecting that pin directly to VDD or VSS.

    You asked for a generalized answer and that is what I provided.  Your assertion that "DSP should never drive these (Boot) pins and device start-up" is a very strong statement.  This is not 100% guaranteed on all C6x devices.  The text above implies that it is true for the C6748 but I still would not recommend tying these pins directly to either VDD or VSS.

    Tom