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Phy Addreess Issue

sarang kalbande
Intellectual 270 points


Hi ,
I am facing problem with beaglebone U-boot Phy address.
The PHY on the Beaglebone board apparently does not come up at address 0 on the MDIO control bus. From the previous power up tests, it seems to come up at address 2,. When I previously discussed this with the application engineer from Micrel (PHY vendor), he suggested that maybe the software could automatically detect which address the PHY is on (like 0 or 1 or 2, etc.) and use that from then on instead if always being on address 0.
My question is how to support for address 2 as well as addrees 0 so whenever it comes at either of those Ethernet should work?

Any possible changes in u-boot and linux point of view

kindly reply

Regards,
Sarang
  • 0
    TI__Guru**** 161600 points

    Hi Sarang,

    Which OS do you use on your board? Android or Ubuntu?

    Best Regards,

    Yordan

  • 0 in reply to Yordan Kovachev
    Intellectual 270 points

    Hi,

    I am using ubuntu 13.04.

    Nothing has changed on the Beaglebone as far as the PHY goes- still LAN8710A.It does have the necessary pulldown resistors.  That is not the issue.   The issue is that one of the pins changes from the PHYAD1 configuration pin at power up to the RXCLK output as the reset line to the part rises.  When it does that it starts to output a clock signal.  Depending on the rise time of the reset signal, this can cause the pin to read a 1 instead of the 0 that the pulldown sets.  We have seen this repeatedly demonstrated and have reduced the possibility of this occurring by removing some of the capacitance on the line to improve its rise time.   We have also added an external reset circuit to enforce a minimum reset period on power up that the TI CPU part does not generate (this is a long story, but there are several issues with the way TI chose to implement the reset line on the board).

    Microchip, who now owns the part, has not admitted that this problem exists; however, their application engineer is the one who suggested making the software capable of operating the PHY at addresses other than 0, in case it comes up at some other address because of the reset issue.

  • 0 in reply to sarang kalbande
    TI__Guru**** 161600 points

    Hi,

    Sorry, I just noticed you're using Beaglebone, which is AM335x device. I am not familiar with the hardware configuration of that board, nor with its kernel specifics.

    This forum is for OMAP44xx devices (OMAP4430/60/70).

    I would recommend you to post this question in the Sitara Forum: http://e2e.ti.com/support/arm/sitara_arm/f/791.aspx

    Best Regards,

    Yordan