Hello Everyone,
I have a custom design with 7.0 inch LCD and AM3352. I have a problem with the LCD display, I'm attaching the video of the LCD jitter.
I have been using the SDK 07 for my development and this problem started a week ago when I recompiled my kernel after I made some modifications to the ADC driver as a test. I am attaching the dts and .config files for my design. It seems that the display is shifting to the right and back.
The LCD and touch were running perfectly fine before the modifications to the ADC driver. I don't know how modifications to the ADC driver is causing a display issue. I have tried installing and uninstalling several drivers in the kernel to try to fix this issue, but no luck so far. I've also tried changing the LCD parameters in the dts file to see if that can be the cause of the problem.
Any help is much appreciated. If you guys have additional questions please do let me know.
Thanks once again for your help.
Regards
Santhosh
/*
* Copyright (C) 2014 Aprilaire www.aprilaire.com
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "am33xx.dtsi"
/ {
model = "AA Home Comfort Control";
compatible = "AA, HCC", "ti,am33xx";
cpus {
cpu@0 {
cpu0-supply = <&dcdc3_reg>; /* Refer to the TPS65217 section */
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x8000000>; /* 128 MB */
};
am33xx_pinmux: pinmux@44e10800 {
pinctrl-names = "default";
/*
* The following definitions are for the PIN mux values. Each GPIO pad has a control
* register that sets up the mode of operation along with other options (see Control Module)
* The offset for the GPIO pads start at 0x800. Each GPIO pin shown below is an offset from
* that address.
* For eg: An address of 0x188 is actually 0x988 ==> conf_i2c0_sda
*
* Tip: Use the uboot mux.c file for reference
*/
i2c0_pins: pinmux_i2c0_pins {
pinctrl-single,pins = <
0x188 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_sda.i2c0_sda */
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c0_scl.i2c0_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x178 (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_ctsn.i2c2_sda */
0x17C (PIN_INPUT_PULLUP | MUX_MODE3) /* uart1_rtsn.i2c2_scl */
>;
};
uart0_pins: pinmux_uart0_pins {
pinctrl-single,pins = <
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
0x174 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
/*
The following are definitions for the Equipment Interface Module
*/
uart1_pins_default: pinmux_uart1_pins_default {
pinctrl-single,pins = <
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
0x184 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* uart1_txd.uart1_txd */
>;
};
uart1_pins_sleep: pinmux_uart1_pins_sleep {
pinctrl-single,pins = <
0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
The following are definitions for the Support Module (GPIO-0 6 is nRE_DE)
*/
uart4_pins_default: pinmux_uart4_pins_default {
pinctrl-single,pins = <
0x168 (PIN_INPUT_PULLUP | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
0x16c (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* uart0_rtsn.uart4_txd */
0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
uart4_pins_sleep: pinmux_uart4_pins_sleep {
pinctrl-single,pins = <
0x180 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x184 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x160 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
The following are the NAND Inteface signals (Standard no change)
*/
nandflash_pins_default: nandflash_pins_default {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
0x74 (PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_wpn.gpio0_30 */
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
nandflash_pins_sleep: nandflash_pins_sleep {
pinctrl-single,pins = <
0x0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0xc (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x10 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x18 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x1c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x70 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x74 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x7c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x90 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x94 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x98 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x9c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
The following definitions are for the LCD Backlight
*/
ecap0_pins_default: backlight_pins {
pinctrl-single,pins = <
0x164 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
>;
};
ecap0_pins_sleep: ecap0_pins_sleep {
pinctrl-single,pins = <
0x164 (PULL_DISABLE | MUX_MODE7) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out */
>;
};
/*
The following definitions are for the MII interface used for wired ethernet
We use the MII interface without Gigabit Ethernet and only have 1 slave PHY
NOTE - Removed all pull-up and pull-down from input signals
We are using DP83848I - for this, the following settings are best. There are
pull-up requirements on the PHY (so make sure these are not conflicting)
*/
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
0x110 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxerr.mii1_rxerr */
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txen.mii1_txen */
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxdv.mii1_rxdv */
0x11c (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd3.mii1_txd3 */
0x120 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd2.mii1_txd2 */
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd1.mii1_txd1 */
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* mii1_txd0.mii1_txd0 */
0x12c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_txclk.mii1_txclk */
0x130 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxclk.mii1_rxclk */
0x134 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd3.mii1_rxd3 */
0x138 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd2.mii1_rxd2 */
0x13c (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd1.mii1_rxd1 */
0x140 (PIN_INPUT_PULLUP | MUX_MODE0) /* mii1_rxd0.mii1_rxd0 */
>;
};
cpsw_sleep: cpsw_sleep {
pinctrl-single,pins = <
/* Slave 1 reset value */
0x108 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x11c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x120 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x12c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x130 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x134 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x138 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
NOTE - Removed pull-up from the MDIO as there is a hard pull-up on the board
*/
davinci_mdio_default: davinci_mdio_default {
pinctrl-single,pins = <
/* MDIO */
0x148 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
>;
};
davinci_mdio_sleep: davinci_mdio_sleep {
pinctrl-single,pins = <
/* MDIO reset value */
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
The following definitions are for MMC-0 (We use GPIO_0_29 as
the card detect). There is no write protect signal. [MODE 7 is normal GPIO]
*/
mmc1_pins_default: pinmux_mmc1_pins {
pinctrl-single,pins = <
0x0F0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
0x0F4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
0x0F8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
0x0FC (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
0x144 (PIN_INPUT | MUX_MODE7) /* rmii1_ref_clk.gpio0_29 */
>;
};
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
pinctrl-single,pins = <
0x0F0 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x0F4 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x0F8 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x0FC (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x100 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x104 (PIN_INPUT_PULLDOWN | MUX_MODE7)
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
/*
The following definitions are for LCD signals (we use 24 bpp)
*/
lcd_pins_default: lcd_pins_default {
pinctrl-single,pins = <
0x20 0x01 /* gpmc_ad8.lcd_data16, OUTPUT | MODE1 */
0x24 0x01 /* gpmc_ad9.lcd_data17, OUTPUT | MODE1 */
0x28 0x01 /* gpmc_ad10.lcd_data18, OUTPUT | MODE1 */
0x2c 0x01 /* gpmc_ad11.lcd_data19, OUTPUT | MODE1 */
0x30 0x01 /* gpmc_ad12.lcd_data20, OUTPUT | MODE1 */
0x34 0x01 /* gpmc_ad13.lcd_data21, OUTPUT | MODE1 */
0x38 0x01 /* gpmc_ad14.lcd_data22, OUTPUT | MODE1 */
0x3c 0x01 /* gpmc_ad15.lcd_data23, OUTPUT | MODE1 */
0xa0 0x00 /* lcd_data0.lcd_data0, OUTPUT | MODE0 */
0xa4 0x00 /* lcd_data1.lcd_data1, OUTPUT | MODE0 */
0xa8 0x00 /* lcd_data2.lcd_data2, OUTPUT | MODE0 */
0xac 0x00 /* lcd_data3.lcd_data3, OUTPUT | MODE0 */
0xb0 0x00 /* lcd_data4.lcd_data4, OUTPUT | MODE0 */
0xb4 0x00 /* lcd_data5.lcd_data5, OUTPUT | MODE0 */
0xb8 0x00 /* lcd_data6.lcd_data6, OUTPUT | MODE0 */
0xbc 0x00 /* lcd_data7.lcd_data7, OUTPUT | MODE0 */
0xc0 0x00 /* lcd_data8.lcd_data8, OUTPUT | MODE0 */
0xc4 0x00 /* lcd_data9.lcd_data9, OUTPUT | MODE0 */
0xc8 0x00 /* lcd_data10.lcd_data10, OUTPUT | MODE0 */
0xcc 0x00 /* lcd_data11.lcd_data11, OUTPUT | MODE0 */
0xd0 0x00 /* lcd_data12.lcd_data12, OUTPUT | MODE0 */
0xd4 0x00 /* lcd_data13.lcd_data13, OUTPUT | MODE0 */
0xd8 0x00 /* lcd_data14.lcd_data14, OUTPUT | MODE0 */
0xdc 0x00 /* lcd_data15.lcd_data15, OUTPUT | MODE0 */
0xe0 0x00 /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
0xe4 0x00 /* lcd_hsync.lcd_hsync, OUTPUT | MODE0 */
0xe8 0x00 /* lcd_pclk.lcd_pclk, OUTPUT | MODE0 */
0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
>;
};
lcd_pins_sleep: lcd_pins_sleep {
pinctrl-single,pins = <
0x20 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad8.lcd_data16 */
0x24 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad9.lcd_data17 */
0x28 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad10.lcd_data18 */
0x2c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad11.lcd_data19 */
0x30 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad12.lcd_data20 */
0x34 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad13.lcd_data21 */
0x38 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad14.lcd_data22 */
0x3c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* gpmc_ad15.lcd_data23 */
0xa0 (PULL_DISABLE | MUX_MODE7) /* lcd_data0.lcd_data0 */
0xa4 (PULL_DISABLE | MUX_MODE7) /* lcd_data1.lcd_data1 */
0xa8 (PULL_DISABLE | MUX_MODE7) /* lcd_data2.lcd_data2 */
0xac (PULL_DISABLE | MUX_MODE7) /* lcd_data3.lcd_data3 */
0xb0 (PULL_DISABLE | MUX_MODE7) /* lcd_data4.lcd_data4 */
0xb4 (PULL_DISABLE | MUX_MODE7) /* lcd_data5.lcd_data5 */
0xb8 (PULL_DISABLE | MUX_MODE7) /* lcd_data6.lcd_data6 */
0xbc (PULL_DISABLE | MUX_MODE7) /* lcd_data7.lcd_data7 */
0xc0 (PULL_DISABLE | MUX_MODE7) /* lcd_data8.lcd_data8 */
0xc4 (PULL_DISABLE | MUX_MODE7) /* lcd_data9.lcd_data9 */
0xc8 (PULL_DISABLE | MUX_MODE7) /* lcd_data10.lcd_data10 */
0xcc (PULL_DISABLE | MUX_MODE7) /* lcd_data11.lcd_data11 */
0xd0 (PULL_DISABLE | MUX_MODE7) /* lcd_data12.lcd_data12 */
0xd4 (PULL_DISABLE | MUX_MODE7) /* lcd_data13.lcd_data13 */
0xd8 (PULL_DISABLE | MUX_MODE7) /* lcd_data14.lcd_data14 */
0xdc (PULL_DISABLE | MUX_MODE7) /* lcd_data15.lcd_data15 */
0xe0 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_vsync.lcd_vsync, OUTPUT | MODE0 */
0xe4 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_hsync.lcd_hsync */
0xe8 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_pclk.lcd_pclk */
0xec (PIN_INPUT_PULLDOWN | MUX_MODE7) /* lcd_ac_bias_en.lcd_ac_bias_en */
>;
};
};
ocp {
uart0: serial@44e09000 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
uart1: serial@48022000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart1_pins_default>;
pinctrl-1 = <&uart1_pins_sleep>;
status = "okay";
};
uart4: serial@481a8000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart4_pins_default>;
pinctrl-1 = <&uart4_pins_sleep>;
/* No extra delay after/before transmissions */
rs485-rts-delay = <0 0>;
/* GPIO-0 pin 6 for data direction */
rts-gpio = <&gpio0 6 GPIO_ACTIVE_LOW>;
/* RTS should be high for transmit and low for receive */
rs485-rts-active-high = <1>;
/* Enable RS-485 */ /* TODO - Should be removed later on - not needed for AA version */
linux,rs485-enabled-at-boot-time;
status = "okay";
};
i2c0: i2c@44e0b000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c0_pins>;
status = "okay";
clock-frequency = <400000>;
/* Set OPP100 (1.10V) for VDD core */
sleep-sequence = /bits/ 8 <
0x02 0x24 0x0b 0x6d /* Password unlock 1 */
0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
0x02 0x24 0x0b 0x6d /* Password unlock 2 */
0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
0x02 0x24 0x0b 0x6c /* Password unlock 1 */
0x02 0x24 0x11 0x86 /* Apply DCDC changes */
0x02 0x24 0x0b 0x6c /* Password unlock 2 */
0x02 0x24 0x11 0x86 /* Apply DCDC changes */
>;
/* Set OPP100 (1.10V) for VDD core */
wake-sequence = /bits/ 8 <
0x02 0x24 0x0b 0x6d /* Password unlock 1 */
0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
0x02 0x24 0x0b 0x6d /* Password unlock 2 */
0x02 0x24 0x10 0x08 /* Set DCDC3 to 1.1V */
0x02 0x24 0x0b 0x6c /* Password unlock 1 */
0x02 0x24 0x11 0x86 /* Apply DCDC changes */
0x02 0x24 0x0b 0x6c /* Password unlock 2 */
0x02 0x24 0x11 0x86 /* Apply DCDC changes */
>;
tps: tps@24 {
reg = <0x24>;
};
};
/*
The following are the USB settings. We only have 1 USB (0) and
is used as a Host
*/
musb: usb@47400000 { /* USB Susbsystem registers */
status = "okay";
control@44e10000 { /* Control Module registers */
status = "okay";
};
usb-phy@47401300 { /* USB-0 PHY registers */
status = "okay";
};
usb@47401000 { /* USB-0 Controller registers */
status = "okay";
dr_mode = "host";
};
dma-controller@07402000 {
status = "okay";
};
};
/*
The following are the I2C-2 settings. We have 2 devices set-up on the
I2C-2 bus - SHT21 and RTC PCF8563
*/
i2c2: i2c@4819c000 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
status = "okay";
clock-frequency = <400000>;
/* Address is 0x80 (but entered as 0x80 >> 1) */
sht21: sht21@40 {
compatible = "Sensirion,sht21";
reg = <0x40>;
};
/* Address is 0xA2 (but entered as 0xA2 >> 1) */
pcf8563: pcf8563@51 {
compatible = "NXP,pcf8563";
reg = <0x51>;
};
};
elm: elm@48080000 {
status = "okay";
};
/*
The following are the PWM settings for the LCD Backlight
*/
epwmss0: epwmss@48300000 {
status = "okay";
ecap0: ecap@48300100 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ecap0_pins_default>;
pinctrl-1 = <&ecap0_pins_sleep>;
};
};
/*
The following are the GPMC (NAND) settings. 2GB NAND
TODO - come back to this later
*/
gpmc: gpmc@50000000 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nandflash_pins_default>;
pinctrl-1 = <&nandflash_pins_sleep>;
ranges = <0 0 0x08000000 0x10000000>; /* CS0: NAND, 256 MB */
nand@0,0 {
reg = <0 0 0>; /* CS0, offset 0 */
nand-bus-width = <8>;
gpmc,device-width = <1>;
gpmc,sync-clk-ps = <0>;
gpmc,cs-on-ns = <0>;
gpmc,cs-rd-off-ns = <44>;
gpmc,cs-wr-off-ns = <44>;
gpmc,adv-on-ns = <6>;
gpmc,adv-rd-off-ns = <34>;
gpmc,adv-wr-off-ns = <44>;
gpmc,we-on-ns = <0>;
gpmc,we-off-ns = <40>;
gpmc,oe-on-ns = <0>;
gpmc,oe-off-ns = <54>;
gpmc,access-ns = <64>;
gpmc,rd-cycle-ns = <82>;
gpmc,wr-cycle-ns = <82>;
gpmc,wait-on-read = "true";
gpmc,wait-on-write = "true";
gpmc,bus-turnaround-ns = <0>;
gpmc,cycle2cycle-delay-ns = <0>;
gpmc,clk-activation-ns = <0>;
gpmc,wait-monitoring-ns = <0>;
gpmc,wr-access-ns = <40>;
gpmc,wr-data-mux-bus-ns = <0>;
ti,nand-ecc-opt= "bch8";
ti,elm-id = <&elm>;
/* MTD partition table */
/* All SPL-* partitions are sized to minimal length
* which can be independently programmable. For
* NAND flash this is equal to size of erase-block */
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "NAND.SPL";
reg = <0x00000000 0x000020000>;
};
partition@1 {
label = "NAND.SPL.backup1";
reg = <0x00020000 0x00020000>;
};
partition@2 {
label = "NAND.SPL.backup2";
reg = <0x00040000 0x00020000>;
};
partition@3 {
label = "NAND.SPL.backup3";
reg = <0x00060000 0x00020000>;
};
partition@4 {
label = "NAND.u-boot-spl-os";
reg = <0x00080000 0x00040000>;
};
partition@5 {
label = "NAND.u-boot";
reg = <0x000C0000 0x00100000>;
};
partition@6 {
label = "NAND.u-boot-env";
reg = <0x001C0000 0x00020000>;
};
partition@7 {
label = "NAND.u-boot-env.backup1";
reg = <0x001E0000 0x00020000>;
};
partition@8 {
label = "NAND.kernel";
reg = <0x00200000 0x00800000>;
};
partition@9 {
label = "NAND.file-system";
reg = <0x00A00000 0x0F600000>;
};
};
};
lcdc: lcdc@0x4830e000 {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&lcd_pins_default>;
pinctrl-1 = <&lcd_pins_sleep>;
status = "okay";
display-timings {
800x480p62 {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <35>;
hback-porch = <45>;
hsync-len = <48>;
vback-porch = <23>;
vfront-porch = <19>;
vsync-len = <3>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
/*
The following are used for setting up the Backlight for the LCD
We use a frequency of 1Khz (period set in ns) and brightness level 0 to 10
*/
backlight {
compatible = "pwm-backlight";
pwms = <&ecap0 0 1000000 0>;
brightness-levels = <0 25 51 76 102 127 153 178 204 230 255>;
default-brightness-level = <7>;
};
/*
Don't know if these settings are needed
*/
panel {
compatible = "ti,tilcdc,panel";
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&lcd_pins_default>;
panel-info {
ac-bias = <255>;
ac-bias-intrpt = <0>;
dma-burst-sz = <16>;
bpp = <32>;
fdd = <0x80>;
sync-edge = <0>;
sync-ctrl = <1>;
raster-order = <0>;
fifo-th = <0>;
};
display-timings {
800x480p62 {
clock-frequency = <33000000>;
hactive = <800>;
vactive = <480>;
hfront-porch = <35>;
hback-porch = <45>;
hsync-len = <48>;
vback-porch = <23>;
vfront-porch = <19>;
vsync-len = <3>;
hsync-active = <1>;
vsync-active = <1>;
};
};
};
};
#include "tps65217.dtsi"
/*
In our case we use TPS65217A specifically for designed for ZCE package
So for us, the settings are as follows:
- DCDC1 is set to 1.8V and will never be changed
- DCDC2 is set at 3.3V and will never be changed
- DCDC3 is set at 1.1V and will never be changed
(NOTE - OPP50 will need change in DDR frequency as well - this is
something which we may choose to do later)
- LDO1 is set at 1.8V and can never be changed
- LDO2 is set at 3.3V and can never be changed
- LS1/LDO3 is switched off by U-boot and should remain off
- LS2/LDO4 is switched off by U-boot and should remain off
*/
&tps {
regulators {
dcdc1_reg: regulator@0 {
regulator-name = "vdds_ddr";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
dcdc2_reg: regulator@1 {
regulator-name = "vdd_peripheral";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
dcdc3_reg: regulator@2 {
regulator-name = "vdd_core";
regulator-name = "vdd_mpu";
regulator-min-microvolt = <1100000>;
regulator-max-microvolt = <1100000>;
regulator-boot-on;
regulator-always-on;
};
ldo1_reg: regulator@3 {
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
regulator-always-on;
};
ldo2_reg: regulator@4 {
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
regulator-always-on;
};
ldo3_reg: regulator@5 {
regulator-boot-off;
regulator-always-off;
};
ldo4_reg: regulator@6 {
regulator-boot-off;
regulator-always-off;
};
};
};
/*
These definitions are for the wired Ethernet
Make sure you override number of slaves and the active slave
*/
&mac {
slaves = <1>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&cpsw_default>;
pinctrl-1 = <&cpsw_sleep>;
};
&davinci_mdio {
pinctrl-names = "default", "sleep";
pinctrl-0 = <&davinci_mdio_default>;
pinctrl-1 = <&davinci_mdio_sleep>;
};
/*
The ethernet phy we use is at address 1 so make sure phy_id is updated.
*/
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <1>;
phy-mode = "mii";
};
/*
These definitions are for the Touch screen and ADC
*/
&tscadc {
status = "okay";
tsc {
ti,wires = <4>;
ti,x-plate-resistance = <200>;
ti,coordinate-readouts = <5>;
ti,wire-config = <0x00 0x11 0x22 0x33>;
};
adc {
ti,adc-channels = <4 5 6 7>;
};
};
/*
These definitions are for the MMC-0 (SD Card)
Card detect is GPIO_0_29
*/
&mmc1 {
status = "okay";
vmmc-supply = <&dcdc2_reg>;
bus-width = <4>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_sleep>;
cd-gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
};
