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Max GPMC Clock Freq.

michael clark
Intellectual 520 points

Is it safe to assume that the the maximum GPMC clock frequency for the OMAP5x EVM is determined by the DPLL_CORE frequency (1500MHz) divided by 8 (or 187MHz)?

This information came from the "Data Manual Operating Condition Addendum v0.6" document.

  • 0
    TI__Guru**** 161600 points

    Hi Michael,

    The following information is presented regarding GPMC_FCLK in the Data Manual Operating Condition Addendum v0.6 (http://www.ti.com/lit/ug/swpu329/swpu329.pdf): 

    Max value of GPMC_CLK is 265.92MHz, when CORE OPP is OPP_NOM.

    Best Regards,

    Yordan