This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Issue with FFTC and Packet DMA in TMS320TC16​618

Other Parts Discussed in Thread: TMS320C6670, TMS320TCI6618

Hi,

I am using TI EVM board (TMDSEVM6670LE) to test LTE code on TMS320TCI6618 processor using code composer studio with Target configuration set to TMS320C6670 (same as TMS320C6618). Code used all three FFTC coprocessor present on the TMS320TCI6618


Observations (from running the code in code composer studio):

1. First time my code runs fine with all three FFTC coprocessors. Code aborts with real time exception.

2. Second time when I load the same code and run program strucks up in FFTC processor. with the exception as given below:

0X21F0014  : FFTC_ERROR_INTERRUPT_RAW_STATUS_REGISTER 0x00000004
==> RX buffer starvation error occurred in queue n.
0x21F0014  : FFTC_ERROR_INTERRUPT_SET_REGISTER 0x00000004

==> RX buffer starvation error occurred in queue n.

3. Similar observation (same as 2) in next time when I loaded the code. I also tried "System Reset" option and  "Chip Reset" option present in code composer studio debug menu and reloaded my code. Observed same error as above.

4. Pressed Hard-Reset button present in TI EVM board (TMDSEVM6670LE). Reloaded the code. Code works fine with all three FFTC coprocessors present in  TMS320C6670 (same as TMS320C6618).


So, I concluded that when code composer aborts due to real time exception (due to issue in my code), FFTC coprocessor + Multi core navigator (Queue Manager + Packet DMA) may be in unknown state. When I reload the program "Multicore navigator" (Packet DMA & Queue Manager together with FFTC co processor) is not working as expected.


I would like to know the reset procedure (with respect to the registers) of "Multicore Navigator" (Queue manager + Packet DMA). I would like to add this to my code so that FFTC coprocessor works fine when I reloaded the program. Please share the procedure to reset the Multicore Navigator.


A quick response is appreciated.


Thanks & Regards,

Srinivas.

  • Hi Srinivas,

    Welcome to the TI E2E forum. I hope you will find many good answers here and in the TI.com documents and in the TI Wiki Pages (for processor issues). Be sure to search those for helpful information and to browse for the questions others may have asked on similar topics (e2e.ti.com).

    1. Have you observed this TI provided examples? 

    We are working with experts to answer your post. Thank you for your patience.

  • Hi Rajasekaran,

    Similar issue is raised by others in this forum.

    Restarting an SRIO Messaging application on C6670 without the use of a System Reset

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/297491.aspx

    Overall issue is same: How to reset the "Multicore Navigator" (to bring into the known state) using DSP core at restart? My observation is similar to what others are reported. Soft reset is not brining "Multicore Navigator" to the known state, where as "Hard reset" works fine.


    I used the following code to reinitialize the QMSS (Thanks to Lance S) (picked up from the following thread)
    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/t/297491.aspx
    Executed the below code on Core#1  (not on core#0)
    // reset the queue manager by clearing the memory regions and pushing a NULL
    // pointer on each queue (this should destroy the descriptors of each queue).
    void ReinitializeQmssDevice()
    {
        uint32 u32MemoryRegion;
        uint32 u32QueueNum;
        uint16 u16Count;
        CSL_Qm_descriptor_region_configRegs *poConfigReg = (CSL_Qm_descriptor_region_configRegs *)CSL_QM_SS_CFG_DESCRIPTION_REGS;

        // Zero out the memory regions. The C6670 has 20 separate memory regions for descriptor sets.
        for(u32MemoryRegion = 0; u32MemoryRegion < 20; u32MemoryRegion++)
        {
            poConfigReg->MEMORY_REGION_BASE_ADDRESS_GROUP[u32MemoryRegion].MEMORY_REGION_BASE_ADDRESS_REG = 0;
            poConfigReg->MEMORY_REGION_BASE_ADDRESS_GROUP[u32MemoryRegion].MEMORY_REGION_DESCRIPTOR_SETUP_REG = 0;
            poConfigReg->MEMORY_REGION_BASE_ADDRESS_GROUP[u32MemoryRegion].MEMORY_REGION_START_INDEX_REG = 0;
        }

        // Push a NULL pointer on each queue. This will loop through all the queues
        // and ensure each is in an empty state. The Qmss_queueEmpty() will write a
        // NULL pointer to the Queue Register D.
        for(u32QueueNum = 0; u32QueueNum < 8192; u32QueueNum++)
        {
            u16Count = Qmss_getQueueEntryCount(u32QueueNum);
            if(u16Count)
            {
                Qmss_queueEmpty((Qmss_QueueHnd) u32QueueNum);
            }
        }
    }

    I executed the above code on Core#1 at restart initialization routine. This doesn't help. I got the same error in executing FFTC (as listed below):
    0X21F0014  : FFTC_ERROR_INTERRUPT_RAW_STATUS_REGISTER 0x00000004
    ==> RX buffer starvation error occurred in queue n.
    0x21F0014  : FFTC_ERROR_INTERRUPT_SET_REGISTER 0x00000004
    ==> RX buffer starvation error occurred in queue n.

    What I have not tried yet.
    1. Packet DMA teardown using CSL functions (as handles are lost during retrain).
    Please list the code to do this.
    2. Setting QMSS registers to default value.
    Is it available in TI docs? (I am planning to put a break point, capture the QMSS default values and hardccode them in the code, bruteforce approach).

    Thanks & Regards,
    Srinivas

  • Hi Rajashekaran,

    I tried to run the following routines at powerup initialization along with resetting the QMSSdevice( ) (as listed above).

    targetFreeQs();
    hwQmTeardown();

    ReinitializeQmssDevice();

    I see the same behaviour. Code reset (soft) still gives the Rx buffer starvation error (as listed above), where as Hard Reset (using a button on TI EVM 6670) works fine. I am assuming hwQMTearDown() will also do the packet DMA teardown. If not, please specify how to do the Packet DMA teardown using the CSL functions.

    Please specify the default settings to be forced on QMSS registers (like the way Hard reset button).

    Please help me. I am struck. Not able to proceed as I am still developing and debugging the LTE Phy. Hard reset is not a proper approach as LTE Phy do go for retrain.

    Thanks & Regards,

    Srinivas

  • Srinivas,

    The MCSDK based example project will run on EVMs once. You need to run again, it requires board hard reset, load the .out file again and run. This is the way made it.

    Yes, your query is an known one. I will check with MCSDK team for further details and let you know.

    Please go through the below E2E discussion, this will help you for Reset the QMSS.

    http://e2e.ti.com/support/dsp/c6000_multi-core_dsps/f/639/p/327455/1140513.aspx#1140513

  • Srinivas,

    If navigator is not locked up, you can disable each CPPI/PKTDMA TX/RX DMA channel, reset each PDSP, write 0 into each queue management D register to throw away all descriptors in the queue, write 0 onto the base address of each descriptor region.  This puts it back into the initial state.  This should not be done unless all the cores are restarted else this will cause navigator code on those cores to fail.
     
    You can also look at the PSC to see if there is reset control for the navigator, without power down control (its always on).