Multiple Chip Selects on L137 SPI

Yes, there is only one chip select pin (SCS[0]) for SPI1.  You don't have to use SCS[0] if you don't want to.  If you are interfacing to multiple slaves, then it's okay  to use multiple GPIOs for chip selects. 

Your sequence for using the SPI port will probably be something like: write to GPIO register to set GPIO low, write data to SPI transmit register or start EDMA transfer, wait for EDMA completion interrupt (assuming EDMA is used), write to GPIO register to setup GPIO high.  There is one caveat to this approach though. 

The SPI transfer is not "done" when EDMA or CPU writes the last character to the SPI transmit register.  The SPI still has to shift out the data!  You don't want to set the GPIO high in the middle of a transfer.  Also, it may not be possible to use SW delays to get around this (the size of the delay depends on too many variables).  One good thing is that SPI always shifts data in as it shifts data out, so the CPU could wait until the receive flag is set on the last transfer to guarantee the SPI is done shifting out the last data.  There are also ways to implement this "workaround" when the EDMA is used.