Hi,
I am having some issues with setting of Rx packet flows on my multicore application.
I currently have setup two different flows (lets call them Com and Eth) for each of the 8 cores on my c6678. Each of the two flows on a core, grab descriptors from a different free queue and put the packets into the same Rx Queue. This is then repeated for the other 7 cores. When I want to send packets from one core to another core on the same chip, I push packets onto the TX queue for QMSS infrastructure for the destination core which has been setup for loopback and it shows up on the Rx channel. I specify in the tag the flow ID for Com for the destination core as I want it to use the Com Free descriptor queue and get pushed onto the Rx queue for the destination core.
When the flow ID for Com are 0,1,2,3,..7 for the cores and 8, 9, 10....15 for the Eth and I want to send packets from say core 0 to core 1, I push onto QMSS Tx queue 1 with the tag set to 1 as that is the flow Id i want to use for Rx and I receive packets using the Rx flow 1. However, when I switch the flow IDs for Com and make them 0-7 for Eth and 8-15 for Com and then instead setup the tag to be 9, the packet reception never happens which does not make much sense. It would appear that irrespective of the flow that is set, it only works if the flow in the tag is set to correspond to the actual core # and not flow ID #.
I am also using the Eth flow IDs in the Pa_configMultiRoute and that appears to be working correctly so cannot explain the difference in the behaviour of flows. In the PA, I have setup in the Ip address matching for stage 1 LUT then I have setup the next stage i.e. stage 2 LUT route info and also the nest stage fail Route info to use multiroute index=0 if it fails on LUT2. I have setup the multiroute index-0 to have the packets get sent to all cores by specifying the routeEntry array in the Pa_configMultiRoute call with the flow IDs specifies as 8-15 for Eth flows for each core. When I send a packet to the DSP chip that would result in the next stage failure, I see the packet get sent to all the cores using the flow IDs 8-15 which is what I expect.
Can someone from ti explain this discrepancy and why the infrastructure QMSS appears not to be working as I would expect it to.
THanks, Aamir
