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C6748 UART EDMA issues receive miss event

Hello

I am using C6748 . I have an application that transmits and receives data via UART at 19200 bauds/sec.

The UART is configured in FIFO mode and is using eDMA support (transmit and receive).

The received data are composed of first the header,  followed by a payload of X bytes (64 to 120).  I set up a DMA receive for the header and after a second DMA receive for the remaining X bytes.

I configured RXFIFTL in FCR to one byte so the DMA controller wakes up for every byte received.

1 ) When my application transmits and receives data NOT at the same time, it works although I have always a DMA missed event for the UART UTXEVT at the end of each transfer completion (could be explain, I'm not using dummy transfert)

2 ) When my application transmits and receives AT the same time, it fails . The transfert request for the header is completed for the receipt  but I receive immediately  (6us after ) a miss event for the UART URXEVT.

The UART URXEVT and the UTXEVT arrive at the same time (same interrrupt).

The miss event URXEVT couldn’t be a "time out received" because  I receive one data at each 520 us (=>19200 b/s) .

It seems like there is a conflict when I use DMAs  to transmit and receive data at the same time on the UART ?

Any clues or advice? or somebody else encountered the similar problems before?

Thank you very much for your help.

  • Hi,

    Thanks for your post.

    I think, there are UART baud rate and EDMA considerations which we need to take care. I would recommend you to walk through the below E2E post for the timebeing and let me work on this to give you a update on this

    http://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/t/324489.aspx

    Also, for the EDMA to miss interrupts, you could refer the below E2E post too:

    http://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/260244.aspx

    Thanks & regards,

    Sivaraj K

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  • Thank you very much Sivaraj for your answer.

    I read the 2 links and they don’t match with my problem. My case is more  simple, I’m using a full duplex link with an UART at very slow rate (19200). My problem appears only when I transmit and receive with DMA at the same time.

    I have a miss event for URXEVT, 6 us after a transfert completion for the receipt, this 6 us value doesn’t match with anything (I receive a byte every 520 us=> RXFIFTL = 1). This happens only if I have a current Transfert for the transmit.

     

    My questions are :

    How a DMA transfert on Transmit can interact with a DMA transfert on Receipt  (see my unexplained URXEVT) ?

    Could an UART works at full duplex with 2 DMAs (one for receipt, one for transmit ) ? if yes, is there some precautions to take ?

     

    Thank you very much in advance for your answer.

    Best Regards.

    Patrick.

  • Hi,

    Thanks for your update.

    I don't think, UART will operate in full duplex mode and to my knowledge, UART Tx. & Rx. operation are completely independant and each DMA channel associated with UART Tx. & Rx. are no way related to each other. Any DMA channel synchronized to UART receive or transmit events (URXEVT/UTXEVT) should be enabled at the time, the UART events are generated otherwise, the corresponding DMA channel would miss the appropriate Tx./Rx. events. 

    Usually in UART receiver section, the receiver shift register (RSR) receives the data bits from the UARTn_RXD pin which would concatenates the data bits and moves the resulting value into receive buffer register (RBR) in the Rx. FIFO mode.

    So, there is no possibility for UART to operate in full duplex mode with 2 DMA's at the same time.

    Thanks & regards,

    Sivaraj K

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  • Patrick,

    Please show us how you have programmed your DMA channels.

    You should never leave the DMA in a state that would lead to an EMR, such as leaving it in the NULL (all 0's) state. With a peripheral like the UART that can have an event occur at any time, an EMR setting means the DMA channel is not programmed correctly.

    Regards,
    RandyP

  • Thank you very much RandyP for your advice.

    See below How I have programmed my DMA channels.

    My received data are composed of first the header,  followed by a payload of X bytes.I set up a DMA receive for the header and after a second DMA receive for the remaining X bytes.

    After I received the header , I receive a miss event for URXVET (6  us after the completed transfert)  , I suppose that is because I configured LINK to 0xFFFF so a null param set Is written to the current Param Set .  As indicated in the User guide SPRUGP9B.  when it happens, I clear the bit in SER for this channel (necessary if I want to retrig the channel)

    The problem is that my second DMA is not working, even though I cleared the miss event bit as indicated. The second transfert is not completed .

    I tried to use a dummy transfer instead of the null transfer.but I have the same problem , the second DMA transfer is not completed, the CPU is never wake up.

     If I configure a manual trigger for the second  DMA, it works if I have only one byte to receive otherwise not.

    Have you got an idea of what could be the problem ?

    Thank you very much again for your help.

    Best regards.

    Pat.

  • Pat,

    lavenu patrick1 said:

    when it happens, I clear the bit in SER for this channel ...

    ..., even though I cleared the miss event bit as indicated.

    You do not indicate that you cleared the missed event, only the SER. You must also clear EMR.

    You should locate TI's drivers for using the UART and EDMA. These should be available in Starterware and in a PSP package. If you do not have those or cannot find them, you may want to search the full E2E or post a related question to the appropriate software forum. I do not know where they are to point you to.

    These problems should have been solved already. The solutions are often hard to reach, and very hard to debug in someone else's code, especially from descriptive writing.

    My only thought is to always have a link param set that will be pointing to an available buffer to capture incoming data. Then use a timeout interrupt to check for the end of data if you never get a DMA buffer-full interrupt. Just something to consider.

    Currently, you are not getting the DMA channel ready soon enough, so you need to program it to be ready before it gets started.

    Regards,
    RandyP

  • Thank you very much randyP for your fast answer..

    Yes I clear also EMR and I have the same problem, my second DMA transfert failed (no transfert completed).

    I change my code to configure my second DMA channel  as soon as possible, that it is to say when I receive the Interrupt  for my first completion transfert. Now I don’t reiceve any miss event for URXEVT but the problem didn’t disappear , my second transfert is not completed.

    I just want to add that my problem appears only when I have a  transmit and a receive at the same time on the UART, when I have a  transmit following by a receive , I have no problem (no miss event  and all transferts are completed).

    I am wondering now if the UART could be used in 2 ways (transmit and receive) at the same time with 2 DMAs, I noticed that the RBR and THR have the same address in the UART and I don’t know how the DMA Controller could manage that  ? Do you think that it could be the problem ?

    Thank you very much in advance for your answer.

    Best regards,

    Pat.