Hello. The DM365 CCDC driver in the Montavista 2.6.18 kernel supports setting up a test pattern generation mode. This is done by programming the CCDCMUX register (0x20) in the ISP System Configuration register range. Is there any more info on how to use this mode as it is not mentioned in the VPFE User's Guide document? I assume the ISIF needs to be setup in master mode for the video timing signals? Is there an external pixel clock still needed?
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