This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

66AK2E05 PCIe Boot

Other Parts Discussed in Thread: 66AK2E05

Hi,

Customer designing with 66AK2E05 asks the following question:

============================================================================

To initially boot the Processor and copy boot code into Flash, I would like to configure the Keystone II processor for PCIe boot. 

Can I setup the processor as a Root Complex in this mode and DMA code into MSM RAM from an external End Point?  And if this is possible, are there any limitations such as it only supports 32-bit addressing (normally I will be doing 64-bit addressing)?  The reason I’m asking is the other two devices in my system are End Points with Bus Mastership capabilities but they cannot be configured as a Root Complex.

==============================================================================

Can you please advise?

Best,

     Rick

  • Rick,

    From 66AK2E05 datasheet section 8.1, when put the device into PCIE boot mode, it can only be set to PCIE end point. If customer wants to use it as PCIE RC, they need to run the PDK example code using it as RC or run Linux kernel on ARM core to use the device as PCIE RC.

    Regards, Eric

  • So what I get out of this reply is that to load code into this device without an external host, I need to have a small boot program in SPI Flash (similar to the UBoot program used with the development board).  I then boot out of SPI flash and  configure the local PCIe Root Complex port, configure the endpoint and enable the PCIe port and then wait.  From there, I will be able to DMA data into the MSM from the endpoint.  Once all the code has been transferred, I can then send a MSI interrupt to the ARM to have it copy code to NOR flash and DDR and begin execution.