This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM385 RCOSC32 output

Other Parts Discussed in Thread: DM385

Hi!

I am trying to output 32KHz from RSOSC to CLKOUT1 pin.  

//set 32kHz to clkout1 
parent = clk_get(NULL, "rcosc_32k_ck");
if (!(parent))
printk("Unable to get [rcosc_32k_ck] clk\n");

child = clk_get(NULL, "sys_clkout2");
if (!(child))
printk("Unable to get [sys_clkout2] clk\n");

ret = clk_set_parent(child, parent);
if (ret < 0)
printk("Unable to set parent clk to sys_clkout2\n");

clk_put(child);
clk_put(parent);

To test the configuration and DEVOSC stability, I setup DEVOSC output to clkout1 and I see 20MHz as should be.

Acording to documentation RTCDIVIDER is fixed.

The frequency I see with oscilloscope when rcosc32 is set to output is about 39kHz..

Can somebody tell me how this could be?

  • Hi Dmitry,

    Dmitry Bodnya said:

    Acording to documentation RTCDIVIDER is fixed.

    The frequency I see with oscilloscope when rcosc32 is set to output is about 39kHz..

    RCOSC32K and RTCDIVIDER are two different clock sources.

    RCOSC32K is internal RC oscillator, which has no input source, and it goes to the WDT0 and can also be exported to the CLKOUT0/1 pins for observation.

    RTCDIVIDER is clock divider, clock input is DEVOSC (20MHz) and output is 32KHz clock which also goes to the WDT0, but can not be exported to the CLKOUT0/1 pin.

    This is extract from the DM814x datasheet (should be similar for the DM385):

    • The system watchdog timer has two possible clock sources:
    – RCOSC32K oscillator
    – RTCDIVIDER

    The RCOSC32K (rcosc_32k_ck) frequency is fixed to 32.768KHz for both DM814x and DM385 devices:

    static struct clk rcosc_32k_ck = {
        .name        = "rcosc_32k_ck",
        .ops        = &clkops_null,
        .rate        = 32768,
        .flags        = RATE_IN_TI814X | RATE_IN_DM385,
    };

    Make sure before you measure the CLKOUT1 pin, that this clkout1 signal is exported on that pin, and CM_CLKOUT_CTRL[7] CLKOUTEN = 0, CLKOUT_MUX[19:16] CLKOUT1_MUX = 0xA

    Best regards,
    Pavel

  • Hi, Pavel.

    Now I understand about RTCDIVIDER, thank you.

    As I said I tried other clocks and I saw them, so I don't think my configuration is wrong.

    But I checked this:

    CM_CLKOUT_CTRL:

    ./mem_rdwr.out --rd 48180100

    [host] 0x48180100:
    [host] 0000008A

    CLKOUT_MUX:

    ./mem_rdwr.out --rd 481C52E4

    [host] 0x481c52e4:

    [host] 000A0000

    Anyway I see 38.7 kHz..

  • Dmitry,

     

    Dmitry Bodnya said:

    CLKOUT_MUX:

    ./mem_rdwr.out --rd 481C52E4

    [host] 0x481c52e4:

    [host] 000A0000

    Anyway I see 38.7 kHz..

    The DM385 datasheet state that this clock should be 32.768KHz:

    http://www.ti.com/lit/ds/symlink/dm385.pdf

    Can you double check your scope settings. Can you experiment with other clock signals, like clkout_prcm_ck, satass_125m_ck (fixed to 125MHz), l3_dpll_ck, osc0_clkin_ck (fixed to 20MHz), osc1_clkin_ck (fixed to 27MHz), etc

    Regards,
    Pavel

  • Hi.

    As I wrote in my first post I checked another configuration - with DEVOSC output to clkout1.

    On our board we have 24,576 MHz AUXCLK.

    I set up  osc1_clk_in output to clkout1:

    parent = clk_get(NULL, "osc1_clkin_ck");//rcosc_32k_ck
    	if (!(parent))
    		printk("Unable to get [osc1_clkin_ck] clk\n");//rcosc_32k_ck
    		
    	child = clk_get(NULL, "sys_clkout2");
    	if (!(child))
    		printk("Unable to get [sys_clkout2] clk\n");
    		
    	ret = clk_set_parent(child, parent);
    	if (ret < 0)
    		printk("Unable to set parent clk to sys_clkout2\n");
    	
    	clk_put(child);
    	clk_put(parent);

    And I see 24,5xx MHz by oscilloscope.

    P.S. By the way, 20000000/610 ~ 32768  and 24576000/610 ~ 40280... interesting. 

  • Dmitry,

    You can measure the 24.5xx MHz with the scope, but 32.768KHz is much smaller value (than 24.5xx MHz) and you are very close to that value (32.768KHz -> 38.7KHz). I suspect your scope is not configured properly for such small values (KHz).

    Regards,
    Pavel

  • Hi Pavel.

    I am measuring frequency with digital oscillosope. I am pretty sure that freq measurement is correct.

    And we have RTC onboard that can output 32768 Hz. And I can measure RTC Square wave output very fine -> 32768 Hz.

  • Dmitry,

    Are you using EVM or custom board? If custom board, then this might be HW related issue.

    The rcosc_32k_ck should be 32768Hz and I am not sure why you get other value.

    clock814x_data.c

    static struct clk rcosc_32k_ck = {
        .name        = "rcosc_32k_ck",
        .ops        = &clkops_null,
        .rate        = 32768,
        .flags        = RATE_IN_TI814X | RATE_IN_DM385,
    };

    Are you using IPNC RDK for the DM385 device?

    Regards,
    Pavel

  • Pavel,

    I am using custom board with DM385.

    The code base is from IPNC RDK.

  • Dmitry,

    Dmitry Bodnya said:
    I am using custom board with DM385.

    Can you try this on DM385 EVM or DM814x EVM?

    Regards,
    Pavel

  • Pavel,

    I can try only on DM385 IPNC  from APPRO.

    I will check it soon.

  • Dmitry,

    Other check you can make through the clock framework, this is what I have on the DM814x EVM:

    root@dm814x-evm:/sys/kernel/debug/clock/rcosc_32k_ck# cat rate
    32768

    Regards,
    Pavel

  • Hi Pavel!

    Finally I get DM385 IPNC to check rcosc_23k_ck on it.

    I configured both clkout: clkout0 and clkout1 to output 32k.

    All I can say - I still see 40kHz!

    So it is already on 2 boards - our custom board and IPNC..

  • Dmitry,

    I work on DM814x device. I will notify our IPNC RDK team for help.

    Regards,
    Pavel

  • Meanwhile, can you check this on DM814x board?

    Regards,
    Pavel

  • Pavel,

    No, 

    we have only DM385 based boards.