TI814x-DDR3-Init-U-Boot doesn't work As Described

Hi Eason,

Thanks for the help. You are correct. I removed all break points and now it is working and asking for below data.

Enter 0 for DDR Controller 0 & 1 for DDR Controller 1
0

DDR START ADDR=0x80000000

Enter the Seed Read DQS Gate Ratio Value in Hex to search the RD DQS Gate Window
0xA5

Enter the Seed Read DQS Ratio Value in Hex to search the RD DQS Ratio Window
0x34

Enter the Seed Write DQS Ratio Value in Hex to search the Write DQS Ratio Window
0x13

Enter the input file Name
Ti814x_Ratio_values

But after entering all details, it gets hanged. Not showing any further progress or any calculated values.
It would be great if you can verify that details shown above are correct or not.


Thanks,
Krinali Shah

Hi  Have you ever filled in the xls

http://processors.wiki.ti.com/index.php/File:DM814x_DDR_Controller_Register_Configuration_spreadsheet_v1.0.zip

and get the timinng register values?

Those register values need to be filled in gel file as well.  It will ensure the DDR works well.

Then we can do SW leveling.

If you take a look at http://processors.wiki.ti.com/index.php/TI814x-DDR3-Init-U-Boot

There is a Note saying:

SW leveling process is not intended to diagnose a non-working DDR interface. It is only intended for fine tuning the DDR PHY when the DDR interface is functionally working

BR,

Eason

Hi Eason,

Thanks for suggestions.

As I have mentioned previously, I am trying to do DDR3 initialization on my EVM module only.

So,  I am using standard timing register values from below link only,

http://processors.wiki.ti.com/index.php/TI814x-DDR3-Init-U-Boot

But the issue is, I have TI DM8127 EVM, and this wiki link explains procedure for DM8148.

I want to know that DDR3_SlaveRatio_ByteWiseSearch_TI814x.out and TI814x_ddr3.gel files will  work for DM8127 also?

Regards,

Krinali Shah

Hi Sorry for missing the detail.

Though you are working on EVM, it is still worth checking if the parts assembled on board is the them as the one on SCH, and in SW.

DM8127/DM8148's DDR controller, they are the same. 

Hi Eason,

Thank you so much for your quick response.

All the parts seem similar on EVM. But still DDR3_SlaveRatio_ByteWiseSearch_TI814x.out program is not running successfully. It shows error as below,

Trouble Reading Memory Block at 0x80724488 on Page 0 of Length 0xd:
Error 0x80001822/-1141
Fatal Error during: Memory, Execution, Timeout, Target,
Processor communication timeout.
It is recommended to RESET EMULATOR. This will disconnect each target,
perform an emulation reset, and then reconnect each target.
Power cycle the target board before continuing.

Gel file I am using is TI814x_ddr3.gel

One more thing I want to confirm is I am using XDS 510 USB, 14 Pin emulator. Can that cause any difference?

Regards,

Krinali Shah

Krunali,

krinali shah said:

Trouble Reading Memory Block at 0x80724488 on Page 0 of Length 0xd:

The 0x80724488 is DDR3_0 address. This means your DDR3 memory is not configured (HW or SW) properly, and you have this fault when trying to access it. See some similar issue below :

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/t/230297.aspx

krinali shah said:

One more thing I want to confirm is I am using XDS 510 USB, 14 Pin emulator. Can that cause any difference?

You can test your "target configuration" under CCS. When you select the board/device and the Connection (XDS510USB Emulator) you can test the connection. If the test run successful, then your emulator is fine.

Regards,
Pavel

Hi Pavel,

Thanks for help.

I am using below version of CCS.

Code Composer Studio

Version: 5.2.1.00018

On target configuration I have selected,

Connection = Spectrun Digital XDS510USB Emulator

target/board = TI814x(no STM, ETB only)

After that I followed the link,

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/716/t/344656.aspx

In which you have mentioned to load DM8148_EVM.gel file, on cortex A8 connection.

After that I removed this gel file and loaded TI814x_ddr3.gel file.

Then I selected,

Scripts -> TI814x DDR Configuration -> DDR3_EMIF0_EMIF1_400MHz_Config

This initialization run successfully

Then I change CPSR.M = 0x13

Enabled NEON from ARM Advanced Features.

After that I loaded DDR3_SlaveRatio_ByteWiseSearch_TI814x.out program.

But that program gives the same error,

Trouble Reading Memory Block at 0x80724488 on Page 0 of Length 0xd:
Error 0x80001822/-1141
Fatal Error during: Memory, Execution, Timeout, Target,
Processor communication timeout.
It is recommended to RESET EMULATOR. This will disconnect each target,
perform an emulation reset, and then reconnect each target.
Power cycle the target board before continuing.

What could be the reason for this?

I have tested my emulator with SdConfigEx v5 utility.

The test went fine and utility is also able to reset the emulator successfully.

Thanks,

Krinali Shah

Krunal,

krinali shah said:

target/board = TI814x(no STM, ETB only)

Can you try with EVMDM8148 (instead TI814x), does it make any difference?

Hi Pavel,

Thanks for suggestion.

By selecting EVM DM8148 board, I connected Cortex A8, with TI814x_ddr3.gel file

After that I configured CPSR.M = 0x13

Enabled NEON from ARM Advanced Features.

After that I loaded DDR3_SlaveRatio_ByteWiseSearch_TI814x.out program.

The program loaded successfully and asks for following details.

[CortexA8] Enter 0 for DDR Controller 0 & 1 for DDR Controller 1
0
[CortexA8] DDR START ADDR=0x80000000
[CortexA8]
[CortexA8] Enter the Seed Read DQS Gate Ratio Value in Hex to search the RD DQS Gate Window
0xA0
[CortexA8]
[CortexA8] Enter the Seed Read DQS Ratio Value in Hex to search the RD DQS Ratio Window
0x34
[CortexA8]
[CortexA8] Enter the Seed Write DQS Ratio Value in Hex to search the Write DQS Ratio Window
0x10
[CortexA8] Enter the input file Name
Ti814x_Ratio_values

After filling all these details, the process gets hanged. Not showing any further progress or any calculated values. out file "Ti814x_Ratio_values" gets generated, but it contains no data (0 bytes file).

Cortex A8 CPU status shows running.

What could be the reason for this?

(Note: With this target selection, program loading runs successfully, only if I don't load TI814x_ddr3.gel file and do not run Scripts -> TI814x DDR Configuration -> DDR3_EMIF0_EMIF1_400MHz_Config)

Regards,

Krinali Shah

Krunali,

The DDR3 software leveling runs fine for DM814x/TI814x based boards, but it might be different for DM8127. I will notify the DM8127 team for help here.

Regards,
Pavel

Hi Pavel,

It would be great if you can notify this issue to DM8127 team.

Thanks a lot for your help and support.

Regards,

Krinali Shah