uboot porting: AM335x + DP83848 in RMII mode, can't ping.

walnutcy

Other Parts Discussed in Thread: AM3352

Dear, I have bought a board as my new project develop board, which built in AM335x+DP83848, with RMII-1, ext-50MHz clock, PHYADDR=0, I had download u-boot 2014.07 version, and changed the gmii-sel to rmii:

writel((RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE), &cdev->miisel);
        cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
        cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RMII;
        puts("eth: PHY-RMII\n");

change the driver, add dp83848 support , and defined CONFIG_PHY_NATSEMI

static int dp83848_config(struct phy_device *phydev)
{
    int mii_reg;
    u32 phyId;

    mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID1);
    phyId = (mii_reg & 0xffff) << 16;
    mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_PHYSID2);
    phyId |= (mii_reg & 0xffff);
    Dbg_WaltPrintf("%s uid:%08X\n", phydev->drv->name, phydev->drv->uid);

   phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, BMCR_RESET);

   genphy_config_aneg(phydev);

   return 0;
}

static struct phy_driver DP83848_driver = {
   .name = "NatSemi DP83848",
   .uid = 0x20005C90,
   .mask = 0x3FFFFFF0,
   .features = PHY_BASIC_FEATURES,
   .config = &dp83848_config,
   .startup = &genphy_startup,
   .shutdown = &genphy_shutdown,
};
register in phy_natsemi_init function, phy_register(&DP83848_driver); and after reset, uboot log tell me it had identified the DP83848,

>[cpsw_phy_init,950]86f26f90,addr:0
>[get_phy_device_by_mask,643]00000001,interface:5
>[create_phy_by_mask,613]get_phy_id(0,-1)=20005C90
>[phy_connect_dev,767]cpsw connected to NatSemi DP83848
>[dp83848_config,124]NatSemi DP83848 uid:20005C90

but ping failed, arp can't get any ret, log:

boot# ping 192.168.16.254
--- NetLoop Entry
--- NetLoop UDP handler set (00000000)
--- NetLoop ARP handler set (00000000)
--- NetLoop timeout handler cancelled
Trying cpsw
link up on port 0, speed 100, full duplex
>[cpdma_submit,685]enter, len=1518
>[cpdma_submit,724]exit
>[cpdma_submit,685]enter, len=1518
>[cpdma_submit,724]exit
>[cpdma_submit,685]enter, len=1518
>[cpdma_submit,724]exit
>[cpdma_submit,685]enter, len=1518
>[cpdma_submit,724]exit
--- NetState set to 0
--- NetLoop Init
Using cpsw device
--- NetLoop timeout handler set (87f896c8)
sending ARP for 192.168.16.254
ARP broadcast 1
>[cpdma_submit,685]enter, len=42
>[cpdma_submit,724]exit
ARP broadcast 2
>[cpdma_submit,685]enter, len=42
>[cpdma_submit,724]exit
--- NetLoop timeout
--- NetState set to 3
--- NetLoop UDP handler set (00000000)
--- NetLoop ARP handler set (00000000)
--- NetLoop timeout handler cancelled
--- NetLoop Fail!
ping failed; host 192.168.16.254 is not alive
Command failed, result=1

over 10 years ago

0 Biser Gatchev-XID over 10 years ago

TI__Guru**** 393215 points

Have you configured the CPSW in Dual EMAC mode?

0 walnutcy over 10 years ago in reply to Biser Gatchev-XID

Prodigy 20 points

Dear, How to config ? my uboot will check twice in init-process after power on, pls check my next log,

Thanks.

Net: >[phy_natsemi_init,162]reg dp83848
Initial value for argc=3
Final value for argc=3
EEPROM probe fail, use default.
eth: PHY-RMII
Initial value for argc=3
Final value for argc=3
>[cpsw_phy_init,950]86f26f90,addr:0
>[get_phy_device_by_mask,643]00000001,interface:5
>[create_phy_by_mask,613]get_phy_id(0,-1)=20005C90
>[phy_connect_dev,767]cpsw connected to NatSemi DP83848
>[dp83848_config,124]NatSemi DP83848 uid:20005C90
>[dp83848_config,131]MII_ADVERTISE:01E1
>[dp83848_config,139]MII_ADVERTISE:3300
cpsw

configured the CPSW in Dual EMAC mode

0 tejas patil over 10 years ago in reply to walnutcy

Expert 1090 points

Hi,
Its working or not? AM335x with dp83848 in MII mode interface ?

Thanks
Tejas

0 Khanh Nguyen65 over 10 years ago

Prodigy 140 points

Hi Walter,

I have the same configuration as you on a custom AM3352 + DP83848. I was wondering if you could help me get this up and running with RMII interface. I have the same code setup as you posted and with the following:

pinmux:

static struct module_pin_mux rmii1_pin_mux[] = {

{OFFSET(mii1_crs), MODE(1) | RXACTIVE}, /* RMII1_CRS */

{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE}, /* RMII1_RX_ERR */

{OFFSET(mii1_txen), MODE(1)}, /* RMII1_TX_EN */

{OFFSET(mii1_rxdv), MODE(1) | RXACTIVE}, /* RMII1_RX_DV */

{OFFSET(mii1_txd1), MODE(1)}, /* RMII1_TD1 */

{OFFSET(mii1_txd0), MODE(1)}, /* RMII1_TD0 */

{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE}, /* RMII1_RD1 */

{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE}, /* RMII1_RD0 */

{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REF_CLK */

{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN},/* MDIO_DATA */

{OFFSET(mdio_clk), MODE(0) | PULLUP_EN}, /* MDIO_CLK */

{-1},

};

am335x_emv.h:

/* Network. */

#define CONFIG_PHYLIB

#define CONFIG_PHY_NATSEMI

#define CONFIG_DRIVER_TI_CPSW

cpu.h:

/* gmii_sel register defines */

#define GMII1_SEL_MII 0x0

#define GMII1_SEL_RMII 0x1

#define GMII1_SEL_RGMII 0x2

#define GMII2_SEL_MII 0x0

#define GMII2_SEL_RMII 0x4

#define GMII2_SEL_RGMII 0x8

#define RGMII1_IDMODE BIT(4)

#define RGMII2_IDMODE BIT(5)

#define RMII1_IO_CLK_EN BIT(6)

#define RMII2_IO_CLK_EN BIT(7)

#define MII1_IO_CLK_EN 0x1

#define MII_MODE_ENABLE (GMII1_SEL_MII | GMII2_SEL_MII)

#define RMII_MODE_ENABLE (GMII1_SEL_RMII | GMII2_SEL_RMII)

#define RGMII_MODE_ENABLE (GMII1_SEL_RGMII | GMII2_SEL_RGMII)

#define RGMII_INT_DELAY (RGMII1_IDMODE | RGMII2_IDMODE)

#define RMII_CHIPCKL_ENABLE (RMII1_IO_CLK_EN | RMII2_IO_CLK_EN)

I don't know what else is missing but I could not get u-boot to recognize the PHY.

Any suggestion would be great.

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uboot porting: AM335x + DP83848 in RMII mode, can't ping.