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spi slave dma probem

1. spi slave transfer: data num < 64K, bitwidth =16, no link and no chain. fifo enable.

How to set ACNT ? For example, I want to transmit and receive 1000 bytes, can I set register like this:

ACNT = 1000; BCNT = 1; CCNT =1;Async mode

why spi-omap2-spi.c in kernel set ACNT = 2; BCNT = 500?

2. At first, but I did not find the file testdma.c in sdk directory:

http://processors.wiki.ti.com/index.php/AM335x_EDMA_Driver%27s_Guide

"The sample EDMA application is available along with other Module examples as a tar archive in src directory of PSP release package (Directory Structure of PSP release package can be seen here AM335x PSP Package Contents)"

Thanks a lot

  • What processor are you using and which SDK?

  • AM335x ti-sdk-am335x-evm-06.00.00.00

    I am studing the code spi master, I have doubt about this code :

     if (tx != NULL) {
            int a_cnt, b_cnt, c_cnt, b_cntrld;

            a_cnt    = 1 << data_type;     
            b_cnt    = 1;
            c_cnt    = element_count / 256;       //why divide 256?
            b_cntrld = SZ_64K - 1;                   // why set this value?

            param.opt          = TCINTEN |
                EDMA_TCC(mcspi_dma->dma_tx_channel) | SYNCDIM ; //ABsync
    ......

    }

        if (rx != NULL) {
            int a_cnt, b_cnt, c_cnt, b_cntrld;

            a_cnt    = 1 << data_type;
            c_cnt    = element_count / (SZ_64K - 1); //
            b_cnt    = element_count - c_cnt * (SZ_64K - 1);
            b_cntrld = SZ_64K - 1;
           param.opt          = TCINTEN |  EDMA_TCC(mcspi_dma->dma_rx_channel); //Async
    ......

    //--------------------------- ---------------------------- -------------------------- ------------------------------ ----------------------------

    My question:

    1. why spi_tx_dma use ABsyn mode, but spi_rx_dma use Async?

    2. relation between data aount and the setting of acnt bcnt ccnt?

  • Another question:

    There are fore event queues for the device for am335x. Is there something wrong with queue3?

    In edma_test.c, I found when event_queue=3, the dma goes wrong.

    result = edma_alloc_channel (EDMA_CHANNEL_ANY, callback1, NULL, event_queue);

     

    Can you tell me the relationship between evnet_queue and channel?

    If I use spi tx and spi rx dma at the same time, tx_dma and rx_dma can use same evnet_queue?

    (In physical layer, tx_dma and rx_dma will work simultaneously)