How to implement a counter incrementing at 1MHz clock rate?

Sachin Suryawanshi

Other Parts Discussed in Thread: SYSBIOS

Is there a way to implement couter increment at 1Mhz Clock rate using any DMTimer in AM335x ? I've checked that , DMtimer can be clocked by 24MHz clock which can be further devided by a prescaler 'n' which further diviedes the by the factor of 2^n. I don't have any provision to provide external clock running at 1MHz. So I was looking for a software only solution in this case. By programming a prescaler of 3 we can get the timer counter increment at 3Mhz. But I require it to increment at 1MHz.

over 11 years ago

0 Moses Isang over 11 years ago

TI__Expert 8175 points

Sachin,

Are you using SYSBIOS(TI-RTOS Kernel)? If so, what version do you have?

Thanks,

Moses

0 Sachin Suryawanshi over 11 years ago in reply to Moses Isang

Prodigy 60 points

Dear Moses,

Yes we are using sysbios (TI -RTOS kernel). We are using bios_6_35_04_50.

Please let us know for possible solution.

Sachin

0 Moses Isang over 11 years ago in reply to Sachin Suryawanshi

TI__Expert 8175 points

Sachin,

I'm trying to understand why exactly you need 1MHz? Is it to prolong the rollover? You can count at I micro-second period with the 3MHz timer. Using software will mostly involve interrupts and having an interrupt firing every i micro-second is not the best idea.

Let me know what you think

Moses

0 Sachin Suryawanshi over 11 years ago in reply to Moses Isang

Prodigy 60 points

Moses,

We require this 1Mhz counter to have a timestamp every 1ms with a rate of 1 us counter. Yes the counter should rollover once it reaches to max count (0xFFFFFFFF). We don't want interrupt at 1 us as it is not a good idea to interrupt our processing at every 1us period. We want a free running counter incrementing at 1 Mhz clock. Can you elaborate more on how to count 1 us period with 3MHz timer.

Sachin

0 Moses Isang over 11 years ago in reply to Sachin Suryawanshi

TI__Expert 8175 points

Sachin,

To count at 1MHz from the 3MHz timer, you know that 3 of a 3MHz timer count make up a single 1MHz clock count. So always divide the timer count value by 3 to get your 1MHz timer value. Makes sense?

Moses

0 Sachin Suryawanshi over 11 years ago in reply to Moses Isang

Prodigy 60 points

Dear Moses,

You are right but do we have any efficiant algorith to apply devide by 3.

Because everytime we will not get a perfect count no. which is multiple of 3. So there will be some error involved in it.

Is there any alternate approach?

0 Moses Isang over 11 years ago in reply to Sachin Suryawanshi

TI__Expert 8175 points

Sachin,

Sorry for just getting to this. If you used a 1 MHz clock you would get only non-fractional values of the timer count. So you can always ignore values that don't mod 3 to 0. Timer count 3 -> 1, 6 -> 2, 9 - > 3 and so on. Values in-between are don't care's. So if you're polling the timer count register, you can read the value mod by 3 and count how many times it returns a 0 to get your 1MHz time. Let me know if this helps.

Thanks,

Moses

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How to implement a counter incrementing at 1MHz clock rate?